Xar-Trek: Run-time Execution Migration among FPGAs and Heterogeneous-ISA CPUs
| dc.contributor.author | Horta, Edson | en |
| dc.contributor.author | Chuang, Ho-Ren | en |
| dc.contributor.author | VSathish, Naarayanan Rao | en |
| dc.contributor.author | Philippidis, Cesar | en |
| dc.contributor.author | Barbalace, Antonio | en |
| dc.contributor.author | Olivier, Pierre | en |
| dc.contributor.author | Ravindran, Binoy | en |
| dc.date.accessioned | 2022-10-03T16:35:42Z | en |
| dc.date.available | 2022-10-03T16:35:42Z | en |
| dc.date.issued | 2021-12-06 | en |
| dc.date.updated | 2022-10-03T07:45:09Z | en |
| dc.description.abstract | Datacenter servers are increasingly heterogeneous: from x86 host CPUs, to ARM or RISC-V CPUs in NICs/SSDs, to FPGAs. Previous works have demonstrated that migrating application execution at run-time across heterogeneous-ISA CPUs can yield significant performance and energy gains, with relatively little programmer effort. However, FPGAs have often been overlooked in that context: hardware acceleration using FPGAs involves statically implementing select application functions, which prohibits dynamic and transparent migration. We present Xar-Trek, a new compiler and run-time software framework that overcomes this limitation. Xar-Trek compiles an application for several CPU ISAs and select application functions for acceleration on an FPGA, allowing execution migration between heterogeneous-ISA CPUs and FPGAs at run-time. Xar-Trek’s run-time monitors server workloads and migrates application functions to an FPGA or to heterogeneous-ISA CPUs based on a scheduling policy. We develop a heuristic policy that uses application workload profiles to make scheduling decisions. Our evaluations conducted on a system with x86-64 server CPUs, ARM64 server CPUs, and an Alveo accelerator card reveal 88%-1% performance gains over no-migration baselines. | en |
| dc.description.version | Published version | en |
| dc.format.mimetype | application/pdf | en |
| dc.identifier.doi | https://doi.org/10.1145/3464298.3493388 | en |
| dc.identifier.uri | http://hdl.handle.net/10919/112059 | en |
| dc.language.iso | en | en |
| dc.publisher | ACM | en |
| dc.rights | Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International | en |
| dc.rights.holder | The author(s) | en |
| dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | en |
| dc.title | Xar-Trek: Run-time Execution Migration among FPGAs and Heterogeneous-ISA CPUs | en |
| dc.type | Article - Refereed | en |
| dc.type.dcmitype | Text | en |