Method and system for overloaded array processing

dc.contributor.assignee	Virginia Tech Intellectual Properties, Inc.	en
dc.contributor.inventor	Hicks, James E. Jr.	en
dc.contributor.inventor	Boyle, Robert J.	en
dc.contributor.inventor	Bayram, Saffet	en
dc.contributor.inventor	Reed, Jeffrey H.	en
dc.date.accessed	2016-08-19	en
dc.date.accessioned	2016-08-24T17:54:29Z	en
dc.date.available	2016-08-24T17:54:29Z	en
dc.date.filed	2001-05-15	en
dc.date.issued	2005-03-15	en
dc.description.abstract	According to the present invention, a method and system for array processing are disclosed. Signals transmitting a symbol set are received. A dominant signal set for each signal, which includes dominant signals that interfere with the signal, is determined. A trellis, which includes paths that represent possible symbol sets, is constructed from the dominant signal sets. An optimal path from the trellis is selected, and the symbol set represented by the optimal path is determined.	en
dc.format.mimetype	application/pdf	en
dc.identifier.applicationnumber	9858316	en
dc.identifier.patentnumber	6868133	en
dc.identifier.uri	http://hdl.handle.net/10919/72505	en
dc.identifier.url	http://pimg-fpiw.uspto.gov/fdd/33/681/068/0.pdf	en
dc.language.iso	en_US	en
dc.publisher	United States Patent and Trademark Office	en
dc.subject.cpc	H04B7/082	en
dc.subject.cpc	H04B7/086	en
dc.subject.uspc	375/341	en
dc.subject.uspcother	714/792	en
dc.title	Method and system for overloaded array processing	en
dc.type	Patent	en
dc.type.dcmitype	Text	en
dc.type.patenttype	utility	en

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