Single-stage input current shaping technique with voltage-doubler rectifier front-end
dc.contributor.assignee | Virginia Tech Intellectual Properties, Inc. | en |
dc.contributor.assignee | Delta Electronics, Inc. | en |
dc.contributor.inventor | Lee, Fred C. | en |
dc.contributor.inventor | Jovanovic, Milan M. | en |
dc.contributor.inventor | Huber, Laszlo | en |
dc.contributor.inventor | Zhang, Jindong Henry | en |
dc.date.accessed | 2016-08-19 | en |
dc.date.accessioned | 2016-08-24T17:54:12Z | en |
dc.date.available | 2016-08-24T17:54:12Z | en |
dc.date.filed | 1998-12-19 | en |
dc.date.issued | 2000-11-14 | en |
dc.description.abstract | A single-stage input-current-shaping (S.sup.2 ICS) converter of the present invention integrates a voltage-doubler-rectifier front-end with a DC/DC output stage. Two families of voltage-doubler S.sup.2 ICS converters are disclosed. In one family, a 2-terminal dither source is provided between a boost inductor and a common input terminal of a storage capacitor and the DC/DC output stage. The 2-terminal dither source includes two paths connected in parallel: a first path for charging and a second path for discharging the boost inductor at a high frequency (HF). In the other family, a 3-terminal dither source includes a third terminal coupled to a pulsating node of the DC/DC output stage. In the 3-terminal dither source, the HF charging path of the boost inductor is coupled between the boost inductor and the pulsating node of the DC/DC output stage, while the HF discharging path of the boost inductor is coupled between the boost inductor and the common input terminal of the storage capacitor and the DC/DC output stage. Due to the voltage-doubler-rectifier front-end, reduction of line-current harmonics can be achieved with a higher conversion efficiency, as compared to a corresponding S.sup.2 ICS converter with a conventional full-bridge rectifier. In addition, a converter of the present invention requires storage capacitors of a lower voltage rating and a smaller total capacitance than the conventional S.sup.2 ICS counterpart. The present invention thereby reduces the size and the cost of the power supply. | en |
dc.format.mimetype | application/pdf | en |
dc.identifier.applicationnumber | 9215758 | en |
dc.identifier.patentnumber | 6147882 | en |
dc.identifier.uri | http://hdl.handle.net/10919/72427 | en |
dc.identifier.url | http://pimg-fpiw.uspto.gov/fdd/82/478/061/0.pdf | en |
dc.language.iso | en_US | en |
dc.publisher | United States Patent and Trademark Office | en |
dc.subject.cpc | H02M1/4258 | en |
dc.subject.cpc | H02M1/10 | en |
dc.subject.cpc | Y02B70/126 | en |
dc.subject.uspc | 363/39 | en |
dc.subject.uspcother | 363/17 | en |
dc.subject.uspcother | 363/20 | en |
dc.subject.uspcother | 363/61 | en |
dc.subject.uspcother | 363/143 | en |
dc.title | Single-stage input current shaping technique with voltage-doubler rectifier front-end | en |
dc.type | Patent | en |
dc.type.dcmitype | Text | en |
dc.type.patenttype | utility | en |
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