Hybrid interleaving structure with adaptive phase locked loop for variable frequency controlled switching converter

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dc.contributor.assigneeVirginia Tech Intellectual Properties, Inc.en
dc.contributor.departmentElectrical and Computer Engineeringen
dc.contributor.departmentCenter for Power Electronics Systemsen
dc.contributor.inventorLi, Qiangen
dc.contributor.inventorLiu, Pei-Hsinen
dc.contributor.inventorLee, Fred C.en
dc.date.accessed2019-02-15en
dc.date.accessioned2019-02-26T22:24:02Zen
dc.date.available2019-02-26T22:24:02Zen
dc.date.filed2015-03-31en
dc.date.issued2018-07-03en
dc.description.abstractIn a multi-phase power converter using a phase-locked loop (PLL) arrangement for interleaving of pulse frequency modulated (PFM) pulses of the respective phases, improved transient response, improved stability of high bandwidth output voltage feedback loop, guaranteed stability of the PLL loop and avoidance of jittering and phase cancellation issues are achieved by anchoring the bandwidth at the frequency of peak phase margin. This methodology is applicable to multi-phase power conveners of any number of phases and any known or foreseeable topology for individual phases and is not only applicable to power converters operating under constant on-time control, but is extendable to ramp pulse modulation (RPM) control and hysteresis control. Interleaving of pulses from all phases is simplified through use of phase managers with a reduced number of PLLS using hybrid interleaving arrangements that do not exhibit jittering even when ripple is completely canceled.en
dc.format.mimetypeapplication/pdfen
dc.identifier.applicationnumber14674680en
dc.identifier.patentnumber10013007en
dc.identifier.urihttp://hdl.handle.net/10919/87842en
dc.identifier.urlhttp://pimg-fpiw.uspto.gov/fdd/07/130/100/0.pdfen
dc.language.isoenen
dc.publisherUnited States Patent and Trademark Officeen
dc.subject.cpcG05F1/56en
dc.subject.cpcH02M3/1584en
dc.subject.cpcH02M2003/1586en
dc.subject.cpcH03L7/06en
dc.titleHybrid interleaving structure with adaptive phase locked loop for variable frequency controlled switching converteren
dc.typePatenten
dc.type.dcmitypeTexten
dc.type.patenttypeutilityen

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