A new characterization method for delay and power dissipation of standard library cells

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Date

2002-11-01

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Hindawi

Abstract

A simplified method for characterization of standard library cells based on the linear delay model is presented in this paper. The linear model is chosen as it allows rapid characterization with a modest number of simulations, while achieving acceptable accuracy. All the parameters of cell delays are defined as 50%-to-50% delays, as distinguished from 50%-to-threshold or threshold-to-50% often used in commercial tools. We found that the 50%-to-50% definition of delays is more consistent and leads to closed-form formula. A subset of library cells in a 0.25 mum technology was characterized using the proposed technique. A test circuit was subsequently generated and simulated to determine the accuracy of the proposed characterization method. SPICE simulations on the test circuit show that the timing estimations obtained through the proposed method is accurate to within 5.6%, and the power estimation was accurate to 4.2%, ignoring parasitics on interconnections.

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Keywords

Standard cell, Characterization, Timing models, Linear model, Power, Estimation, Systems, Computer science, hardware & architecture, Engineering, electrical

Citation

Jos B. Sulistyo and Dong S. Ha, "A New Characterization Method for Delay and Power Dissipation of Standard Library Cells," VLSI Design, vol. 15, no. 3, pp. 667-678, 2002. doi:10.1080/1065514021000012273.