VTechWorks Repository :: Browsing by Author "Ngo, Khai D. T."

Browsing by Author "Ngo, Khai D. T."

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Active Source Management to Maintain High Efficiency in Resonant Conversion over Wide Load Range
Danilovic, Milisav (Virginia Tech, 2015-09-18)
High-frequency and large amplitude current is a driving requirement for applications such as induction heating, wireless power transfer, power amplifier for magnetic resonant imaging, electronic ballasts, and ozone generators. Voltage-fed resonant inverters are normally employed, however, current-fed (CF) resonant inverters are a competitive alternative when the quality factor of the load is significantly high. The input current of a CF resonant inverter is considerably smaller than the output current, which benefits efficiency. A simple, parallel resonant tank is sufficient to create a high-power sinusoidal signal at the output. Additionally, input current is limited at the no-load condition, providing safe operation of the system. Drawbacks of the CF resonant inverter are associated with the implementation of the equivalent current source. A large input inductor is required to create an equivalent dc current source, to reduce power density and the bandwidth of the system. For safety, a switching stage is implemented using bidirectional voltage-blocking switches, which consist of a series connection of a diode and a transistor. The series diode experiences significant conduction loss because of large on-state voltage. The control of the output current amplitude for constant-frequency inverters requires a pre-regulation stage, typically implemented as a cascaded hard-switched dc/dc buck converter. The pre-regulation also reduces the efficiency. In this dissertation, a variety of CF resonant inverters with two input inductors and two grounded switches are investigated for an inductive-load driver with loaded quality factor larger than ten, constant and high-frequency (~500 kHz) operation, high reactive output power (~14 kVA), high bandwidth (~100 kHz), and high efficiency (over 95 %). The implementation of such system required to question the fundamental operation of the CF resonant inverter. The input inductance is reduced by around an order of magnitude, ensuring sufficient bandwidth, and allowing rich harmonic content in the input current. Of particular importance are fundamental and second harmonic components since they influence synchronization of the zero-crossing of the output voltage and the turn-on of the switches. The synchronization occurs at a particular frequency, termed synchronous frequency, and it allows for zero switching loss in the switches, which greatly boosts efficiency. The synchronous conditions were not know prior this work, and the dependence among circuit parameters, input current harmonics, and synchronous frequency are derived for the first time. The series diode of the bidirectional switch can reduce the efficiency of the system to below 90 %, and has to be removed from the system. The detrimental current-spikes can occur if the inverter is not operated in synchronous condition, such as in transients, or during parametric variations of the load coil. The resistance of the load coil has a wide variance, five times or more, while the inductance changes as well by a few percent. To accommodate for non-synchronous conditions, a low-loss current snubber is proposed as a safety measure to replace lossy diodes. The center-piece of the dissertation is the proposal of a two-phase zero-voltage switching buck pre-regulator, as it enables fixed frequency and synchronous operation of the inverter under wide parametric variations of the load. The synchronous operation is controlled by phase-shifting the switching functions of the pre-regulator and inverter. The pre-regulator reduces the dc current in the input inductors, which is a main contributor to current stress and conduction losses in the inverter switches. Total loss of the inverter switches is minimized since no switching loss is present and minimal conduction losses are allowed. The dc current in the input inductors, once seen as a means to transfer power to load, is now contradictory perceived as parasitic, and the power is transferred to the load using a fundamental frequency harmonic! The input current to the resonant tank, previously designed to be a square-wave, now resembles a sine-wave with very rich harmonic content. Additionally, the efficiency of the pre-regulator at heavy-load condition is improved by ensuring ZVS for with an additional inductive tank. The dissertation includes five chapters. The first chapter is an introduction to current-fed resonant inverters, applications, and state-of-the-art means to ensure constant frequency operation under load's parametric variations. The second chapter is dedicated to the optimization of the CF resonant inverter topology with a dc input voltage, two input inductors, and two MOSFETs. The topology is termed as a boost amplifier. If the amplifier operates away from the synchronous frequency, detrimental current spikes will flow though the switches since the series diodes are eliminated. Current spikes reduce the efficiency up to few percent and can create false functioning of the system. Operation at the synchronous frequency is achieved with large, bulky, input inductors, typically around 1-2 mH or higher, when the synchronous frequency follows the resonant frequency of the tank at 500 kHz. The input inductance cannot be reduced arbitrarily to meet the system bandwidth requirement, since the synchronous frequency is increased based on the inductance value. The relationship between the two (input inductance and the synchronous frequency) was unknown prior this work. The synchronous frequency is determined to be a complicated mathematical function of harmonic currents through the input inductors, and it is found using the harmonic decomposition method. As a safety feature, a current snubber is implemented in series with the resonant tank. Snubber utilizes a series inductance of cable connection between the tank and the switching stage, and it is more efficient than the previously employed series diodes. Topology optimization and detailed design procedure are provided with respect to efficiency and system dynamics. The mathematics is verified by a prototype rated at 14 kVA and 1.25 kW. The input inductance is reduced by around an order of magnitude, with the synchronous frequency increase of 2 %. The efficiency of the power amplifier reached 98.5 % and might be improved further with additional optimization. Silicon carbide MOSFETs are employed for their capability to operate efficiently at high frequency, and high temperature. The third chapter is dedicated to the development of the boost amplifier's large signal model using the Generalized State-space Averaging (GSSA) method. The model accurately predicts amplifier's transient and steady-state operation for any type of input voltage source (dc, dc with sinusoidal ripple, pulse-width modulated), and for either synchronous or non-synchronous operating frequency. It overcomes the limitation of the low-frequency model, which works well only for dc voltage-source input and at synchronous frequency. As the measure of accuracy, the zero-crossing of the resonant voltage is predicted with an error less than 2° over a period of synchronous operation, and for a range of interest for input inductance (25 μH – 1000 μH) and loaded-quality factor (10 – 50). The model is validated both in simulation and hardware for start-up transient and steady-state operation. It is then used in the synthesis of modulated output waveforms, including Hann-function and trapezoidal-function envelopes of the output voltage/current. In the fourth chapter, the GSSA model is employed in development of the PWM compensation method that ensures synchronous operation at constant frequency for the wide variation of the load. The boost amplifier is extended with a cascaded pre-regulator whose main purpose is to control the output resonant voltage. The pre-regulator is implemented as two switching half-bridges with same duty-cycle and phase-shift of 180°. The behavior of the cascaded structure is the same as of the buck converter, so the half-bridges are named buck pre-regulators. ZVS operation is ensured by putting an inductive tank between the half-bridges. Each output of half-bridges is connected to each of input inductors of the boost to provide the PWM excitation. Using the GSSA model, the synchronous condition and control laws are derived for the amplifier. Properties of the current harmonics in the input inductors are well examined. It is discovered that the dc harmonic, once used to transfer power, is unwanted (parasitic) since it increases conduction loss in switches of the boost. A better idea is to use the fundamental harmonic for power transfer, since it does not create loss in the switches. Complete elimination of the dc current is not feasible for constant frequency operation of the amplifier since the dc current depends on the load coil's resistance. However, significant mitigation of around 55 % is easily achievable. The proposed method improves significantly the efficiency of both the buck pre-regulator and the boost. Synchronous operation is demonstrated in hardware for fixed switching frequency of 480 kHz, power level up to 750 W, input voltage change from 300 V to 600 V, load coil's resistance change of three times, and load coil's inductance change of 3.5 %. Measured efficiency is around 95 %, with a great room for improvements. Chapter five summarizes key contributions and concludes the dissertation.
Bayesian Optimization of PCB-Embedded Electric-Field Grading Geometries for a 10 kV SiC MOSFET Power Module
Cairnie, Mark A. Jr. (Virginia Tech, 2021-04-28)
A finite element analysis (FEA) driven, automated numerical optimization technique is used to design electric field grading structures in a PCB-integrated bus bar for a 10 kV bondwire-less silicon-carbide (SiC) MOSFET power module. Due to the ultra-high-density of the power module, careful design of field-grading structures inside the bus bar is required to mitigate the high electric field strength in the air. Using Bayesian optimization and a new weighted point-of-interest (POI) cost function, the highly non-uniform electric field is efficiently optimized without the use of field integration, or finite-difference derivatives. The proposed optimization technique is used to efficiently characterize the performance of the embedded field grading structure, providing insights into the fundamental limitations of the system. The characterization results are used to streamline the design and optimization of the bus bar and high-density module interface. The high-density interface experimentally demonstrated a partial discharge inception voltage (PDIV) of 11.6 kV rms. When compared to a state-of-the-art descent-based optimization technique, the proposed algorithm converges 3x faster and with 7x smaller error, making both the field grading structure and the design technique widely applicable to other high-density high-voltage design problems.
Characterization and Modeling of High-Switching-Speed Behavior of SiC Active Devices
Chen, Zheng (Virginia Tech, 2009-12-18)
To support the study of potential utilization of the emerging silicon carbide (SiC) devices, two SiC active switches, namely 1.2 kV, 5 A SiC JFET manufactured by SiCED, and 1.2 kV, 20 A SiC MOSFET by CREE, have been investigated systematically in this thesis. The static and switching characteristics of the two switches have firstly been characterized to get the basic device information. Specific issues in the respective characterization process have been explored and discussed. Many of the characterization procedures presented are generic, so that they can be applied to the study of any future SiC unipolar active switches. Based on the characterization data, different modeling procedures have also been introduced for the two SiC devices. Considerations and measures about model improvement have been investigated and discussed, such as predicting the MOSFET transfer characteristics under high drain-source bias from switching waveforms. Both models have been verified by comparing simulation waveforms with the experimental results. imitations of each model have been explained as well. In order to capture the parasitic ringing in the very fast switching transients, a modeling methodology has also been proposed considering the circuit parasitics, with which a device-package combined simulation can be conducted to reproduce the detailed switching waveforms during the commutation process. This simulation, however, is inadequate to provide deep insights into the physics behind the ringing. Therefore a parametric study has also been conducted about the influence of parasitic impedances on the device's high-speed switching behavior. The main contributors to the parasitic oscillations have been identified to be the switching loop inductance and the device output junction capacitances. The effects of different parasitic components on the device stresses, switching energies, as well as electromagnetic interference (EMI) have all been thoroughly analyzed, whose results exhibit that the parasitic ringing fundamentally does not increase the switching loss but worsens the device stresses and EMI radiation. Based on the parametric study results, this thesis finally compares the difference of SiC JFET and MOSFET in their respective switching behavior, comes up with the concept of device switching speed limit under circuit parasitics, and establishes a general design guideline for high-speed switching circuits on device selection and layout optimization.
Colossal tunability in high frequency magnetoelectric voltage tunable inductors
Yan, Yongke; Geng, Liwei D.; Tan, Yaohua; Ma, Jianhua; Zhang, Lujie; Sanghadasa, Mohan; Ngo, Khai D. T.; Ghosh, Avik W.; Wang, Yu U.; Priya, Shashank (2018-11-27)
The electrical modulation of magnetization through the magnetoelectric effect provides a great opportunity for developing a new generation of tunable electrical components. Magnetoelectric voltage tunable inductors (VTIs) are designed to maximize the electric field control of permeability. In order to meet the need for power electronics, VTIs operating at high frequency with large tunability and low loss are required. Here we demonstrate magnetoelectric VTIs that exhibit remarkable high inductance tunability of over 750% up to 10 MHz, completely covering the frequency range of state-of-the-art power electronics. This breakthrough is achieved based on a concept of magnetocrystalline anisotropy (MCA) cancellation, predicted in a solid solution of nickel ferrite and cobalt ferrite through first-principles calculations. Phase field model simulations are employed to observe the domain-level strain-mediated coupling between magnetization and polarization. The model reveals small MCA facilitates the magnetic domain rotation, resulting in larger permeability sensitivity and inductance tunability.
Constant-Flux Inductor with Enclosed-Winding Geometry for Improved Energy Density
Cui, Han (Virginia Tech, 2013-06-28)
The passive components such as inductors and capacitors are bulky parts on circuit boards. Researchers in academia, government, and industry have been searching for ways to improve the magnetic energy density and reduce the package size of magnetic parts. The "constant-flux" concept discussed herein is leveraged to achieve high magnetic-energy density by distributing the magnetic flux uniformly, leading to inductor geometries with a volume significantly lower than that of conventional products. A relatively constant flux distribution is advantageous not only from the density standpoint, but also from the thermal standpoint via the reduction of hot spots, and from the reliability standpoint via the suppression of flux crowding. For toroidal inductors, adding concentric toroidal cells of magnetic material and distributing the windings properly can successfully make the flux density distribution uniform and thus significantly improve the power density. Compared with a conventional toroidal inductor, the constant-flux inductor introduced herein has an enclosed-winding geometry. The winding layout inside the core is configured to distribute the magnetic flux relatively uniformly throughout the magnetic volume to obtain a higher energy density and smaller package volume than those of a conventional toroidal inductor. Techniques to shape the core and to distribute the winding turns to form a desirable field profile is described for one class of magnetic geometries with the winding enclosed by the core. For a given set of input parameters such as the inductor's footprint and thickness, permeability of the magnetic material, maximum permissible magnetic flux density for the allowed core loss, and current rating, the winding geometry can be designed and optimized to achieve the highest time constant, which is the inductance divided by resistance (L/Rdc). The design procedure is delineated for the constant-flux inductor design together with an example with three winding windows, an inductance of 1.6 µH, and a resistance of 7 mΩ. The constant-flux inductor designed has the same inductance, dc resistance, and footprint area as a commercial counterpart, but half the height. The uniformity factor α is defined to reflect the uniformity level inside the core volume. For each given magnetic material and given volume, an optimal uniformity factor exists, which has the highest time constant. The time constant varies with the footprint area, inductor thickness, relative permeability of the magnetic material, and uniformity factor. Therefore, the objective for the constant-flux inductor design is to seek the highest possible time constant, so that the constant-flux inductor gives a higher inductance or lower resistance than commercial products of the same volume. The calculated time-constant-density of the constant-flux inductor designed is 4008 s/m3, which is more than two times larger than the 1463 s/m3 of a commercial product. To validate the concept of constant-flux inductor, various ways of fabrication for the core and the winding were explored in the lab, including the routing process, lasing process on the core, etching technique on copper, and screen printing with silver paste. The most successful results were obtained from the routing process on both the core and the winding. The core from Micrometals has a relative permeability of around 22, and the winding is made of copper sheets 0.5 mm thick. The fabricated inductor prototype shows a significant improvement in energy density: at the same inductance and resistance, the volume of the constant-flux inductor is two times smaller than that of the commercial counterpart. The constant-flux inductor shows great improvement in energy density and the shrinking of the total size of the inductor below that of the commercial products. Reducing the volume of the magnetic component is beneficial to most power. The study of the constant-flux inductor is currently focused on the dc analysis, and the ac analysis is the next step in the research.
Correlation between tunability and anisotropy in magnetoelectric voltage tunable inductor (VTI)
Yan, Yongke; Geng, Liwei D.; Zhang, Lujie; Gao, Xiangyu; Gollapudi, Sreenivasulu; Song, Hyun-Cheol; Dong, Shuxiang; Sanghadasa, Mohan; Ngo, Khai D. T.; Wang, Yu U.; Priya, Shashank (Springer Nature, 2017-11-22)
Electric field modulation of magnetic properties via magnetoelectric coupling in composite materials is of fundamental and technological importance for realizing tunable energy efficient electronics. Here we provide foundational analysis on magnetoelectric voltage tunable inductor (VTI) that exhibits extremely large inductance tunability of up to 1150% under moderate electric fields. This field dependence of inductance arises from the change of permeability, which correlates with the stress dependence of magnetic anisotropy. Through combination of analytical models that were validated by experimental results, comprehensive understanding of various anisotropies on the tunability of VTI is provided. Results indicate that inclusion of magnetic materials with low magnetocrystalline anisotropy is one of the most effective ways to achieve high VTI tunability. This study opens pathway towards design of tunable circuit components that exhibit field-dependent electronic behavior.
Design and Development of High Density High Temperature Power Module with Cooling System
Ning, Puqi (Virginia Tech, 2010-05-04)
In recent years, the SiC power semiconductor has emerged as an attractive alternative that pushes the limitations of junction temperature, power rating, and switching frequency of Si devices. These advanced properties will lead converters to higher power density. However, the reliability of the SiC semiconductor is still under investigation, and at the same time, the standard Si device packages do not meet the requirement of high temperature operation. In order to take full advantage of SiC semiconductor devices, high density, high temperature device packaging needs to be developed. In this dissertation, a high temperature wirebond package for multi-chip phase-leg power module using SiC devices was designed, developed, fabricated and tested. The details of the material selection and thermo-mechanical reliability evaluation are described. High temperature power test shows that the presented package can perform well at the high junction temperature. In order to increase the power density, reduce the parasitic parameters, and enhance the electrical, thermo-mechanical performance over wirebond packages, planar package is utilized to better take advantages of SiC device. This dissertation proposed a novel package, in which the interconnections can be formed on small dimensional pads and enclosed pads that may baffle the regular solder based connection in other planar packages. Electrical and thermo-mechanical tests of the prototype module demonstrate the functionality and reliability of the presented planar packaging methodology. In this dissertation, together with the design example, the manual module layout design and automatic module layout design process are also presented. Furthermore, a systematic optimal design process and parametric study of the heatsink-fan cooling system by applying the analytical model is described. This dissertation also established a systematic testing procedure which can rapidly detect defects and reduce the risk in high temperature packaging testing. Finally, a wirebond module and a planar module are designed for 175 ºC junction temperature and 250 ºC junction temperatures. All the key concepts and ideas developed in this work are implemented in the prototype module development and then verified by the experimental results.
Development of Bi-Directional Module using Wafer-Bonded Chips
Kim, Woochan (Virginia Tech, 2015-01-06)
Double-sided module exhibits electrical and thermal characteristics that are superior to wire-bonded counterpart. Such structure, however, induces more than twice the thermo-mechanical stress in a single-layer structure. Compressive posts have been developed and integrated into the double-sided module to reduce the stress to a level acceptable by silicon dice. For a 14 mm x 21 mm module carrying 6.6 mm x 6.6 mm die, finite-element simulation suggested an optimal design having four posts located 1 mm from the die; the z-direction stress at the chip was reduced from 17 MPa to 0.6 MPa.
A diffusion-viscous analysis and experimental verification of defect formation in sintered silver bond-line
Xiao, Kewei; Ngo, Khai D. T.; Lu, Guo-Quan (Cambridge University Press, 2014-04-01)
The low-temperature joining technique (LTJT) by silver sintering is being implemented by major manufacturers of power electronic devices and modules for bonding power semiconductor chips. A common die-attach material used with LTJT is a silver paste consisting of silver powder (micrometer- or nanometer-sized particles) mixed in organic solvent and binder formulation. It is believed that the drying of the paste during the bonding process plays a critical role in determining the quality of the sintered bond-line. In this study, a model based on the diffusion of solvent molecules and viscous mechanics of the paste was introduced to determine the stress and strain states of the silver bond-line. A numerical simulation algorithm of the model was developed and coded in the C++ programming language. The numerical simulation allows determination of the time-dependent physical properties of the silver bond-line as the paste is being dried with a heating profile. The properties studied were solvent concentration, weight loss, shrinkage, stress, and strain. The stress is the cause of cracks in the bond-line and bond-line delamination. The simulated results were verified by experiments in which the formation of bond-line cracks and interface delamination was observed during the pressure-free drying of a die-attach nanosilver paste. The simulated results were consistent with our earlier experimental findings that the use of uniaxial pressure of a few mega-Pascals during the drying stage of a nanosilver paste was sufficient to produce high-quality sintered joints. The insight offered by this modeling study can be used to develop new paste formulations that enable pressure-free, low-temperature sintering of the die-attach material to significantly lower the cost of implementing the LTJT in manufacturing.
Four-Output Isolated Power Supply for the Application of IGBT Gate Drive
Tan, Zheyuan (Virginia Tech, 2010-05-05)
This thesis focuses on the design issues of the multiple-output boost full-bridge converter, which is constructed by cascading the boost regulator with the inductor-less full-bridge converter. The design of the boost regulator has been proposed briefly with component selection and compensator design. After that, the inductor-less full-bridge converter is analyzed extensively. In the first place, the operation principle of the inductor-less full-bridge converter is introduced. Later, the effect of parasitic resistance and inductance is analyzed in an L-R series circuit model as step-response, which relates the drop of output voltage to the load current. Then, the effects of the dc blocking capacitor for the unbalanced load condition and unbalanced duty cycle are tackled. The theoretical results are compared with the experimental results and the simulation results to verify the relationship between the output voltage drop and load current. The overall efficiency of the converter is tested under various conditions. The design of the planar transformer is critical to limit the profile of the converter and the leakage phenomenon. A planar transformer fit for the inductor-less full-bridge converter is designed and analyzed in 3D FEA software. An N-port transformer model is proposed to implement the inductance matrix into the leakage inductance matrix for circuit analysis. Based on this N-port model several measurements to extract the parameters in this model are proposed, where only the impedance analyzer is needed. Finally, the effects of trace layout and encapsulation on breakdown voltage in PCB are summarized from experimental results.
High Frequency, High Power Density Integrated Point of Load and Bus Converters
Reusch, David Clayton (Virginia Tech, 2012-04-16)
The increased power consumption and power density demands of modern technologies combined with the focus on global energy savings have increased the demands on DC/DC power supplies. DC/DC converters are ubiquitous in everyday life, found in products ranging from small handheld electronics requiring a few watts to warehouse sized server farms demanding over 50 megawatts. To improve efficiency and power density while reducing complexity and cost the modular building block approach is gaining popularity. These modular building blocks replace individually designed specialty power supplies, providing instead an optimized complete solution. To meet the demands for lower loss and higher power density, higher efficiency and higher frequency must be targeted in future designs. The objective of this dissertation is to explore and propose methods to improve the power density and performance of point of load modules ranging from 10 to 600W. For non-isolated, low current point of load applications targeting outputs ranging from one to ten ampere, the use of a three level converter is proposed to improve efficiency and power density. The three level converter can reduce the voltage stress across the devices by a factor of two compared to the traditional buck; reducing switching losses, and allowing for the use of improved low voltage lateral and lateral trench devices. The three level can also significantly reduce the size of the inductor, facilitating 3D converter integration with a low profile magnetic by doubling the effective switching frequency and reducing the volt-second across the inductor. This work also proposes solutions for the drive circuit, startup, and flying capacitor balancing issues introduced by moving to the three level topology. The emerging technology of gallium nitride can offer the ability to push the frequency of traditional buck converters to new levels. Silicon based semiconductors are a mature technology and the potential to further push frequency for improved power density is limited. GaN transistors are high electron mobility transistors offering a higher band gap, electron mobility, and electron velocity than Si devices. These material characteristics make the GaN device more suitable for higher frequency and voltage operation. This work will discuss the fundamentals of utilizing the GaN transistor in high frequency buck converter design; addressing the packaging of the GaN transistor, fundamental operating differences between GaN and Si devices, driving of GaN devices, and the impact of dead time on loss in the GaN buck converter. An analytical loss model for the GaN buck converter is also introduced. With significant improvements in device technology and packaging, the circuit layout parasitics begins to limit the switching frequency and performance. This work will explore the design of a high frequency, high density 12V integrated buck converter, identifying the impact of parasitics on converter performance, propose design improvements to reduce critical parasitics, and assess the impact of frequency on passive integration. The final part of this research considers the thermal design of a high density 3D integrated module; this addresses the thermal limitations of standard PCB substrates for high power density designs and proposes the use of a direct bond copper (DBC) substrate to improve thermal performance in the module. For 48V isolated applications, the current solutions are limited in frequency by high loss generated from the use of traditional topologies, devices, packaging, and transformer design. This dissertation considers the high frequency design of a highly efficient unregulated bus converter targeting intermediate bus architectures for use in telecom, networking, and high end computing applications. This work will explore the impact of switching frequency on transformer core volume, leakage inductance, and winding resistance. The use of distributed matrix transformers to reduce leakage inductance and winding resistance, improving high frequency transformer performance will be considered. A novel integrated matrix transformer structure is proposed to reduce core loss and core volume while maintaining low leakage inductance and winding resistance. Lastly, this work will push for higher frequency, higher efficiency, and higher power density with the use of low loss GaN devices.
High-frequency Quasi-square-wave Flyback Regulator
Zhang, Zhemin (Virginia Tech, 2016-11-28)
Motivated by the recent commercialization of gallium-nitride (GaN) switches, an effort was initiated to determine whether it was feasible to switch the flyback converter at 5 MHz in order to improve the power density of this versatile isolated topology. Soft switching techniques have to be utilized to eliminate the switching loss to maintain high efficiency at multi-megahertz. Compared to the traditional modeling of zero-voltage-switching quasi-square-wave converters, a numerical methodology of parameters design is proposed based on the steady-state model of zero-voltage switching quasi-square-wave flyback converter. The magnetizing inductance is selected to guarantee zero-voltage switching for the entire input and load range with the trade-off design for conduction loss and turn-off loss. A design methodology is introduced to select a minimum core volume for an inductor or coupled inductors experiencing appreciable core loss. The geometric constant Kgac = MLT/(Ac2WA) is shown to be a power function of the core volume Ve, where Ac is the effective core area, WA is the area of the winding window, and MLT is the mean length per turn for commercial toroidal, ER, and PQ cores, permitting the total loss to be expressed as a direct function of the core volume. The inductor is designed to meet specific loss or thermal constraints. An iterative procedure is described in which two- or three-dimensional proximity effects are first neglected and then subsequently incorporated via finite-element simulation. Interleaved and non-interleaved planar PCB winding structures were also evaluated to minimize leakage inductance, self-capacitance and winding loss. The analysis on the trade-off between magnetic size, frequency, loss and temperature indicated the potential for a higher density flyback converter. A small-signal equivalent circuit of QSW converter was proposed to design the control loop and to understand the small-signal behavior. By adding a simple damping resistor on the traditional small-signal CCM model, it can predict the pole splitting phenomenon observed in QSW converter. With the analytical expressions of the transfer functions of QSW converters, the impact of key parameters including magnetizing inductance, dead time, input voltage and output power on the small-signal behavior can be analyzed. The closed-loop bandwidth can be pushed much higher with this modified model, and the transient performance is significantly improved. With the traditional fix dead-time control, a large amount of loss during dead time occurred, especially for the eGaN FETs with high reverse voltage drop. An adaptive dead time control scheme was implemented with simple combinational logic circuitries to adjust the turn on time of the power switches. A variable deadtime control was proposed to further improve the performance of adaptive dead-time control with simplified sensing circuit, and the extra conduction loss caused by propagation delay in adaptive dead-time control can be minimized at multi-megahertz frequency.
Integrated Current Sensor using Giant Magneto Resistive (GMR) Field Detector for Planar Power Module
Kim, Woochan (Virginia Tech, 2012-11-16)
Conventional wire bond power modules have limited application for high-current operation, mainly because of their poor thermal management capability. Planar power modules have excellent thermal management capability and lower parasitic inductance, which means that the planar packaging method is desirable for high-power applications. For these reasons, a planar power module for an automotive motor drive system was developed, and a gate-driver circuit with an over-current protection was planned to integrate into the module. This thesis discusses a current-sensing method for the planar module, and the integrated gate driver circuit with an over-current protection. After reviewing several current-sensing methods, it becomes clear that most popular current-sensing methods, such as the Hall-Effect sensor, the current transformer, the Shunt resistor, and Rogowski coils, exhibit limitations for the planar module integration. For these reasons, a giant magneto resistive (GMR) magnetic-field detector was chosen as a current-sensing method. The GMR sensor utilizes the characteristics of the giant magneto resistive (GMR) effect in that it changes its resistance when it is exposed to the magnetic-flux. Because the GMR resistor can be fabricated at the wafer level, a packaged GMR sensor is very compact when compared with conventional current sensors. In addition, the sensor detects magnetic-fields, which does not require direct contact to the current-carrying conductor, and the bandwidth of the sensor can be up to 1 MHz, which is wide enough for the switching frequencies of most of motor drive applications. However, there are some limiting factors that need to be considered for accurate current measurement: • Operating temperature • Magnetic-flux density seen by a GMR resistor • Measurement noise If the GMR sensor is integrated into the power module, the ambient temperature of the sensor will be highly influenced by the junction temperature of the power devices. Having a consistent measurement for varying temperature is important for module-integrated current sensors. An experiment was performed to see the temperature characteristics of a GMR sensor. The measurement error caused by temperature variation was quantified by measurement conditions. This thesis also proposes an active temperature error compensation method for the best use of the GMR sensor. The wide current trace of the planar power module helps to reduce the electrical/thermal resistance, but it hinders having a strong and constant magnetic-field-density seen by the GMR sensor. In addition, the eddy-current effect will change the distribution of the current density and the magnetic-flux-density. These changes directly influence the accurate measurement of the GMR sensor. Therefore, analyzing the magnetic-flux distribution in the planar power module is critical for integrating the GMR sensor. A GMR sensor is very sensitive to noise, especially when it is sensing current flowing in a wide trace and exposed to external fields, neither of which can be avoided for the operation of power modules. Post-signal processing is required, and the signal-conditioning circuit was designed to attenuate noise. The signal-conditioning circuit was designed using an instrumentation amplifier, and the circuit attenuated most of the noise that hindered accurate measurement. The over-current protection circuit along with the gate driver circuit was designed, and the concept was verified by experiments. The main achievements of this study can be summarized as: • Characterization of conventional current-sensing methods • Temperature characterization of the GMR resistor • Magnetic-flux distribution of the planar power module • Design of the signal-conditioning circuit and over-current protection circuit
Integrated Frequency-Selective Conduction Transmission-Line EMI Filter
Liang, Yan (Virginia Tech, 2008-12-08)
The multi-conductor lossy transmission-line model and finite element simulation tool are used to analyze the high-frequency attenuator and the DM transmission-line EMI filter. The insertion gain, transfer gain, current distribution, and input impedance of the filter under a nominal design are discussed. In order to apply the transmission-line EMI filter to power electronics systems, the performance of the filter under different dimensions, material properties, and source and load impedances must be known. The influences of twelve parameters of the DM transmission-line EMI filter on the cut-off frequency, the roll-off slope, and other characteristics of the insertion gain and transfer gain curves are investigated. The most influential parameters are identified. The current sharing between the copper and nickel conductors under different parameters are investigated. The performance of the transmission-line EMI filter under different source and load impedances is also explored. The measurement setups of the DM transmission-line EMI filter using a network analyzer have been discussed. The network analyzer has a common-ground problem that influences the measured results of the high-frequency attenuator. However, the common-ground problem has a negligible influence on the measured results of the DM transmission-line EMI filter. The connectors and copper strips between the connectors and the filter introduce parasitic inductance to the measurement setup. Both simulated and measured results show that transfer gain curve is very sensitive to the parasitic inductance. However, the insertion gain curve is not sensitive to the parasitic inductance. There are two major methods to reduce the parasitic inductance of the measurement setup: using small connectors and applying a four-terminal measurement setup. The transfer gain curves of three measurement setups are compared: the two-terminal measurement setup with BNC connectors, the two-terminal measurement setup with Sub Miniature version B (SMB) connectors, and the four-terminal measurement setup with SMB connectors. The four-terminal measurement setup with SMB connectors is the most accurate one and is applied for all the transfer gain measurements in this dissertation. This dissertation also focuses on exploring ways to improve the performance of the DM transmission-line EMI filter. Several improved structures of the DM transmission-line EMI filter are investigated. The filter structure without insulation layer can greatly reduce the thickness of the filter without changing its performance. The meander structure can increase the total length of the filter without taking up too much space and results in the cut-off frequency being shifted lower and achieving more attenuation. A prototype of the two-dielectric-layer filter structure is built and measured. The measurement result confirms that a multi-dielectric-layer structure is an effective way to achieve a lower cut-off frequency and more attenuation. This dissertation proposes a broadband DM EMI filter combining the advantages of the discrete reflective LC EMI filter and the transmission-line EMI filter. Two DM absorptive transmission-line EMI filters take the place of the two DM capacitors in the discrete reflective LC EMI filter. The measured insertion gain of the prototype has a large roll-off slope at low frequencies and large attenuation at high frequencies. The dependence of the broadband DM EMI filter on source and load impedances is also investigated. Larger load (source) impedance gives more attenuation no matter it is resistive, inductive or capacitive. The broadband DM EMI filter always has more high-frequency attenuation than the discrete reflective LC EMI filter under different load (source) impedances.
Method and apparatus for balancing current and power
(United States Patent and Trademark Office, 2019-01-22)
Aspects of the disclosure provide a power circuit that includes a first switch circuit in parallel with a second switch circuit. The first switch circuit and the second switch circuit are coupled to a first control node, a second control node, a first power node and a second power node via interconnections. The power circuit receives a control signal between the first control node and the second control node to control a current flowing from the first power node to the second power node through the first switch circuit and the second switch circuit. At least one of a first source terminal of the first switch circuit and a second source terminal of the second switch circuit is coupled to the second control node with a resistive element having a specific resistance.
Model Reduction by Generalized Falk Method for Efficient Field-Circuit Simulations
Loc Vu-Quoc; Zhai, Yuhu; Ngo, Khai D. T. (2021-11-25)
The Generalized Falk Method (GFM) for coordinate transformation, together with two model-reduction strategies based on this method, are presented for efficient coupled field-circuit simulations. Each model-reduction strategy is based on a decision to retain specific linearly-independent vectors, called trial vectors, to construct a vector basis for coordinate transformation. The reduced-order models are guaranteed to be stable and passive since the GFM is a congruence transformation of originally symmetric positive definite systems. We also show that, unlike the Pade-via-Lanczos (PVL) method, the GFM does not generate unstable positive poles while reducing the order of circuit problems. Further, the proposed GFM is also faster when compared to methods of the type Lanczos (or Krylov) that are already widely used in circuit simulations for electrothermal and electromagnetic problems. The concept of response participation factors is introduced for the selection of the trial vectors in the proposed model-reduction methods. Further, we present methods to develop simple equivalent circuit networks for the field component of the overall field-circuit system. The implementation of these equivalent circuit networks in circuit simulators is discussed. With the proposed model-reduction strategies, significant improvement on the efficiency of the generalized Falk method is illustrated for coupled field-circuit problems.
Modeling, Implementation, and Simulation of Two-Winding Plate Inductor
Cui, Han (Virginia Tech, 2017-06-30)
Design of magnetic component is a key factor in achieving high frequency, high power-density converters. Planar magnetics are widely used in bias power supplies for the benefits of low profile and their compatibility with printed-circuit boards (PCB). The coupled inductors with winding layers sandwiched between two core plates are studied in this dissertation in order to model the self-inductance, winding loss, and core loss. The most challenging task for the plate-core inductor is to model the magnetic field with finite core dimensions, very non-uniform flux pattern, and large fringing flux. The winding is placed near the edge of the core to maximize the energy within the limited footprint and the amount of energy stored outside the core volume is not negligible. The proportional-reluctance, equal-flux (PREF) model is developed to build the contours with equal amount of flux by governing the reluctance of the flux path. The shapes of the flux lines are modeled by different functions that guided by the finite-element simulation (FES). The field from the flux lines enables calculation of inductance, winding loss, and core loss, etc. The inductance matrix including self-inductance and mutual inductance of a coupled inductor is important for circuit simulation and evaluation. The derivation of the inductance matrix of inductors with plate-core structure is described in Chapter 2. Two conditions are defined as common-mode (CM) field and differential-mode (DM) field in order to compute the matrix parameters. The proportional-reluctance, equal-flux (PREF) model introduced is employed to find the CM field distribution, and the DM field distribution is found from functions analogous to that of a solenoid's field. The inductance calculated are verified by flex-circuit prototypes with various dimensions, and the application of the inductance model is presented at the last with normalized parameters to cover structures within a wide-range. In circuit where coupled inductors are used instead of transformers, the phase shift between the primary and secondary side is not always 180 degrees. Therefore, it is important to model the winding loss for a coupled inductor accurately. The winding loss can be calculated from the resistance matrix, which is independent of excitations but only relates to the frequency and geometry. The methodology to derive the resistance matrix from winding losses of coupled inductors is discussed. Winding loss model with 2D magnetic field is improved by including the additional eddy current loss for better accuracy for the plate-core structures. The resistance matrix calculated from the model is verified by both measurement results and finite-element simulation (FES) of coupled-inductor prototypes. Accurate core loss model is required for designing magnetic components in power converters. Most existing core loss models are based on frequency domain calculation and they cannot be implemented in SPICE simulations. The core loss model in the time domain is discussed in Chapter 5 for arbitrary current excitations. An effective ac flux density is derived to simplify the core loss calculation with non-uniform field distribution. A sub-circuit for core loss simulation is established in LTSPICE that is capable of being integrated to the power stage simulation. Transient behavior and accurate simulation results from the LTSPICE matches very well with the FES results. An equivalent circuit for coupled windings is developed for inductors with significant fringing effect. The equivalent circuit is derived from a physical model that captures the flux paths by having a leakage inductor and two mutual inductors on the primary and secondary side. A mutual resistor is added to each side in parallel with one mutual inductor to model the winding loss with open circuit and phase-shift impact. Two time-varying resistors are employed to represent the core loss in the time-domain. The equivalent circuit is verified by both finite-element simulation (FES) and prototypes fabricated with flexible circuit.
New Way of Generating Electromagnetic Waves
Hosseini-Fahraji, Ali; Manteghi, Majid; Ngo, Khai D. T. (2020-05)
This paper presents a new method for generating low-frequency electromagnetic waves for navigation and communication in challenging environments, such as underwater and underground. The main idea is to store magnetic energy in two different spaces using the interaction between a permanent magnet and a magnetic material. The magnetic reluctance of the medium around the permanent magnet is modulated to change the magnetic flux path. The nonlinear properties of magnetic material as a critical phenomenon are used for effective modulation. As a result, a time-variant field is generated by the modulation of the permanent magnet flux. This non-resonant time-variant characterization means that the transmitter is not bound to the fundamental limits of the antennas and can transmit higher data rates. A prototype transmitter as a prove-of-concept is designed and tested based on the proposed idea. Compared to the rotating magnet, the prototyped transmitter can modulate $50\%$ of the stored energy of the permanent magnet with much lower power consumption.
Optimization and Fabrication of Heat Exchangers for High-Density Power Control Unit Applications
Parida, Pritish Ranjan (Virginia Tech, 2010-08-05)
The demand for more power and performance from electronic equipment has constantly been growing resulting in an increased amount of heat dissipation from these devices. Thermal management of high-density power control units for hybrid electric vehicles is one such application. Over the last few years, the performance of this power control unit has been improved and size has been reduced to attain higher efficiency and performance causing the heat dissipation as well as heat density to increase significantly. However, the overall cooling system has remained unchanged and only the heat exchanger corresponding to the power control unit (PCU) has been improved. This has allowed the manufacturing costs to go down. Efforts are constantly being made to reduce the PCU size even further and also to reduce manufacturing costs. As a consequence, heat density will go up (~ 200 – 250 W/cm2) and thus, a better high performance cooler/heat exchanger is required that can operate under the existing cooling system design and at the same time, maintain active devices temperature within optimum range (<120 – 125 °C) for higher reliability. The aim of this dissertation was to study the various cooling options based on jet impingement, mini-channel, ribbed mini-channel, phase change material and double sided cooling configurations for application in hybrid electric vehicle and other similar consumer products and perform parametric and optimization study on selected designs. Detailed experimental and computational analysis was performed on different cooling designs to evaluate overall performance. Severe constraints such as choice of coolant, coolant flow-rate, pressure drop, minimum geometrical size and operating temperature were required for the overall design. High performance jet impingement based cooler design with incorporated fin-like structures induced swirl and provided enhanced local heat transfer compared to traditional cooling designs. However, the cooling scheme could manage only 97.4% of the target effectiveness. Tapered/nozzle-shaped jets based designs showed promising results (~40% reduction in overall pressure drop) but were not sufficient to meet the overall operating temperature requirement. Various schemes of mini-channel arrangement, which were based on utilizing conduction and convection heat transfer in a conjugate mode, demonstrated improved performance over that of impingement cooling schemes. Impingement and mini-channel based designs were combined to show high heat transfer rates but at the expense of higher pressure drops (~5 times). As an alternate, mini-channel based coolers with ~1.5 mm size channels having trip strips or ribs were studied to accommodate the design constraints and to enhance local as well as overall heat transfer rates and achieve the target operating temperature. A step by step approach to the development of the heat exchanger is provided with an emphasis on system level design. The computational based optimization methodology is confirmed by a fabricated test bed to evaluate overall performance and compare the predicted results with actual performance. Additionally, one of the impingement based configuration (Swirl-Impingement-Fin) developed during the course of this work was applied to the internal cooling of a turbine blade trailing edge and was shown to enhance the thermal performance by at least a factor of 2 in comparison to the existing pin-fin technology for the conditions studied in this work.
Optimization of Bonding Geometry for a Planar Power Module to Minimize Thermal Impedance and Thermo-Mechanical Stress
Cao, Xiao (Virginia Tech, 2011-05-02)
This study focuses on development a planar power module with low thermal impedance and thermo-mechanical stress for high density integration of power electronics systems. With the development semiconductor technology, the heat flux generated in power device keeps increasing. As a result, more and more stringent requirements were imposed on the thermal and reliability design of power electronics packaging. In this dissertation, a boundary-dependent RC transient thermal model was developed to predict the peak transient temperature of semiconductor device in the power module. Compared to conventional RC thermal models, the RC values in the proposed model are functions of boundary conditions, geometries, and the material properties of the power module. Thus, the proposed model can provide more accurate prediction for the junction temperature of power devices under variable conditions. In addition, the transient thermal model can be extracted based on only steady-state thermal simulation, which significantly reduced the computing time. To detect the peak transient temperature in a fully packaged power module, a method for thermal impedance measurement was proposed. In the proposed method, the gate-emitter voltage of an IGBT which is much more sensitive to the temperature change than the widely used forward voltage drop of a pn junction was monitored and used as temperature sensitive parameter. A completed test circuit was designed to measure the thermal impedance of the power module using the gate-emitter voltage. With the designed test set-up, in spite of the temperature dependency of the IGBT electrical characteristics, the power dissipation in the IGBT can be regulated to be constant by adjusting the gate voltage via feedback control during the heating phase. The developed measurement system was used to evaluate thermal performance and reliability of three different die-attach materials. From the prediction of the proposed thermal model, it was found that the conventional single-sided power module with wirebond connection cannot achieve both good steady-state and transient thermal performance under high heat transfer coefficient conditions. As a result, a plate-bonded planar power module was designed to resolve the issue. The comparison of thermal performance for conventional power module and the plate-bonded power module shows that the plate-bonded power module has both better steady-state and transient thermal performance than the wirebonded power module. However, due to CTE mismatch between the copper plate and the silicon device, large thermo-mechanical stress is induced in the bonding layer of the power module. To reduce the stress in the plate-bonded power module, an improved structure called trenched copper plate structure was proposed. In the proposed structure, the large copper plate on top of the semiconductor can be partitioned into several smaller pieces that are connected together using a thin layer copper foil. The FEM simulation shows that, with the improved structure, the maximum von Mises stress and plastic strain in the solder layer were reduced by 18.7% and 67.8%, respectively. However, the thermal impedance of the power module increases with reduction of the stress. Therefore, the trade-off between these two factors was discussed. To verify better reliability brought by the trenched copper plate structure, twenty-four samples with three different copper plate structures were fabricated and thermally cycled from -40°C to 105°C. To detect the failure at the bonding layer, the curvature of these samples were measured using laser scanning before and after cycling. By monitoring the change of curvature, the degradation of bonding layer can be detected. Experimental results showed that the samples with different copper plate structure had similar curvature before thermal cycle. The curvatures of the samples with single copper plate decreased more than 80% after only 100 cycles. For the samples with 2 × 2 copper plate and the samples with 3 × 3 copper plate, the curvatures became 75.8% and 77.5% of the original values, respectively, indicating better reliability than the samples with single copper plate. The x-ray pictures of cross-sectioned samples confirmed that after 300 cycles, the bonding layer for the sample with single copper plate has many cracks and delaminations starting from the edge.

Browsing by Author "Ngo, Khai D. T."

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