Browsing by Author "Wang, Boyan"

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    1 kV GaN-on-Si Quasi-Vertical Schottky Rectifier
    Qin, Yuan; Xiao, Ming; Zhang, Ruizhe; Xie, Qingyun; Palacios, Tomás; Wang, Boyan; Ma, Yunwei; Kravchenko, Ivan; Briggs, Dayrl P.; Hensley, Dale K.; Srijanto, Bernadeta R.; Zhang, Yuhao (IEEE, 2023-07)
    This work demonstrates quasi-vertical GaN Schottky barrier diodes (SBDs) on 6-inch Si substrate with a breakdown voltage (BV) over 1 kV, the highest BV reported in vertical GaN-on-Si SBDs to date. The deep mesa inherently in quasi-vertical devices is leveraged to form a self-aligned edge termination, and the mesa sidewall is covered by the p-type nickel oxide (NiO) as a reduced surface field (RESURF) structure. This novel termination enables a parallel-plane junction electric field of 2.8 MV/cm. The device also shows low turn-on voltage of 0.5 V, and low specific on-resistance of 1.1 m ·cm2. Moreover, the device exhibits excellent overvoltage robustness under the continuous 800 V stress in the unclamped inductive switching test. These results show the good promise of the low-cost vertical GaN-on-Si power diodes.
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    2 kV, 0.7 mΩ·cm2 Vertical Ga2O3 Superjunction Schottky Rectifier with Dynamic Robustness
    Qin, Yuan; Porter, Matthew; Xiao, Ming; Du, Zhonghao; Zhang, Hongming; Ma, Yunwei; Spencer, Joseph; Wang, Boyan; Song, Qihao; Sasaki, Kohei; Lin, Chia-Hung; Kravchenko, Ivan; Briggs, Dayrl P.; Hensley, Dale K.; Tadjer, Marko; Wang, Han; Zhang, Yuhao (IEEE, 2023)
    We report the first experimental demonstration of a vertical superjunction device in ultra-wide bandgap (UWBG) Ga2O3. The device features 1.8 μm wide, 2×1017 cm-3 doped n-Ga2O3 pillars wrapped by the charge-balanced p-type nickel oxide (NiO). The sidewall NiO is sputtered through a novel self-align process. Benefitted from the high doping in Ga2O3, the superjunction Schottky barrier diode (SJ-SBD) achieves a ultra-low specific on-resistance (RON,SP) of 0.7 mΩ·cm2 with a low turn-on voltage of 1 V and high breakdown voltage (BV) of 2000 V. The RON,SP~BV trade-off is among the best in all WBG and UWBG power SBDs. The device also shows good thermal stability with BV > 1.8 kV at 175 oC. In the unclamped inductive switching tests, the device shows a dynamic BV of 2.2 kV and no degradation under 1.7 kV repetitive switching, verifying the fast acceptor depletion in NiO under dynamic switching. Such high-temperature and switching robustness are reported for the first time in a heterogeneous superjunction. These results show the great potential of UWBG superjunction power devices.
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    Design, Fabrication, and Packaging of Gallium Oxide Schottky Barrier Diodes
    Wang, Boyan (Virginia Tech, 2021-12-17)
    Gallium Oxide (Ga2O3) is an ultra-wide bandgap semiconductor with a bandgap of 4.5–4.9 eV, which is higher than the bandgap of Silicon (Si), Silicon Carbide (SiC), and Gallium Nitride (GaN). A benefit of this wide-bandgap is the high critical electric field of Ga2O3, which is estimated to be from 5 MV/cm to 9 MV/cm. This allows a higher Baliga’s figure of merit (BFOM), i.e., unipolar Ga2O3 devices potentially possess a smaller specific on-resistance (Ron,sp) as compared to the Si, SiC, and GaN devices with the same breakdown voltage (BV). This prospect makes Ga2O3 devices promising candidates for next-generation power electronics. This thesis explores the design, fabrication, and packaging of vertical Ga2O3 Schottky barrier diodes (SBDs). The power SBD allows for a small forward voltage and a fast switching speed; thus, it is ubiquitously utilized in power electronics systems. It is also a building block for many advanced power transistors. Hence, the study of Ga2O3 SBDs is expected to pave the way for developing a series of Ga2O3 power devices. In this work, a vertical β-Ga2O3 SBD with a novel edge termination, which is the small-angle beveled field plate (SABFP), is fabricated on thinned Ga2O3 substrates. This SABFP structure decreases the peak electric field (Epeak) at the triple point when the Ga2O3 SBD is reverse biased, resulting in a BV of 1.1 kV and an Epeak of 3.5 MV/cm. This device demonstrates a BFOM of 0.6 GW/cm2, which is among the highest in β-Ga2O3 power devices and is comparable to the state-of-the-art vertical GaN SBDs. The high-temperature characteristics of Ga2O3 SBDs with a 45o beveled angle sidewall edge termination are studied at temperatures up to 600 K. As compared to the state-of-the-art SiC and GaN SBDs with a similar blocking voltage, the vertical Ga2O3 SBDs are capable of operating at higher temperatures and show a smaller leakage current increase with temperature. The leakage current mechanisms were also revealed at various temperatures and reverse biases. A new fabrication method of a dielectric field plate and Ga2O3 mesa of a medium angle (10o~30o) is achieved by controlling the adhesion between the photoresist (PR) and the dielectric surface. As compared to the small-angle termination, this medium-angle edge termination can allow a superior yield and uniformity in device fabrication, at the same time maintaining the major functionalities of beveled edge termination. Good surface morphology of the field plates and Ga2O3 mesa of the medium angle 10o~30o sidewall angle is verified by atomic force microscopy. Finally, large-area Ga2O3 SBDs are fabricated and packaged using silver sintering as the die attach. The sintered silver joint has higher thermal conductivity and better reliability as compared to the solder joint. The metal finish on the anode and cathode has been optimized for silver sintering. Large-area, packaged Ga2O3 SBDs with an anode size of 3×3 mm2 are prototyped. They show a forward current of over 5 A, a current on/off ratio of ~109, and a BV of 190 V. To the best of the author’s knowledge, this is the first experimental demonstration of a large-area, packaged Ga2O3 power device.
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    Design, Fabrication, Characterization, and Packaging of Gallium Oxide Power Diodes
    Wang, Boyan (Virginia Tech, 2024-02-22)
    Gallium Oxide (Ga2O3) is an ultra-wide bandgap semiconductor with a bandgap of 4.5–4.9 eV, which is larger than that of Silicon (Si), Silicon Carbide (SiC), and Gallium Nitride (GaN). A benefit of this ultra-wide bandgap is the high-temperature stability due to the low intrinsic carrier concentration. Another benefit is the high critical electric field (Ec), which is estimated to be from 6 MV/cm to 8 MV/cm in Ga2O3. This allows for a superior Baliga's figure of merit (BFOM) of unipolar Ga2O3 power devices, i.e., they potentially can achieve a smaller specific on-resistance (RON,SP) as compared to the Si, SiC, and GaN devices with the same breakdown voltage (BV). The above prospects make Ga2O3 devices the promising candidates for next-generation power electronics. This dissertation explores the design, fabrication, characterization, and packaging of vertical β-Ga2O3 Schottky barrier diodes (SBDs) and P-N diodes. The power SBDs allow for a small forward voltage and a fast switching speed; thus, it is ubiquitously utilized in power electronics systems. Meanwhile, the Ga2O3 power P-N diodes have the benefit of smaller leakage current, and the diode structure could be a building block for many advanced diodes and transistors. Hence, the study of Ga2O3 Schottky and P-N diodes is expected to provide the foundation for developing a series of Ga2O3 power devices. Firstly, vertical Ga2O3 Schottky and P-N diodes with a novel edge termination (ET), the multi-layer Nickel Oxide (NiO) junction termination extension (JTE), are fabricated on Ga2O3 substrates. This multi-JTE NiO structure decreases the peak electric field (Epeak) at the triple point of device edge when the Ga2O3 diodes are reversely biased. For SBDs, BV reach 2.5 kV, the 1-D junction field reaches 3.08 MV/cm, and the BFOM exceeds 1 GW/cm2. For P-N diodes, BV reaches 3.3 kV, the junction field reaches 4.2 MV/cm, and the BFOM reaches 2.6 GW/cm2. These results are among the highest in Ga2O3 power devices and are comparable to the state-of-the-art vertical GaN Schottky and P-N diodes. Notably, all these diodes are small-area devices. Secondly, large-area (3 mm×3 mm anode size) Ga2O3 Schottky and P-N diodes with high current capability are fabricated to explore the packaging, thermal management, and switching characteristics of Ga2O3 diodes. The same ET is applied for the large-area P-N diode. The fabricated large-area P-N diodes have a turn-on voltage of 2 V, a differential on-resistance (Ron) of 0.2 Ω, and they can reach at least 15 A when measured in the pulse mode. The BV of large-area Ga2O3 P-N diodes varies due to the fabrication non-uniformity, but the best device achieves a BV of 1.6 kV, standing among the highest values reported for large-area Ga2O3 diodes. Also, the large-area Ga2O3 SBDs with similar current rating but with a FP ET are fabricated mainly for the packaging and thermal management studies. Thirdly, medium-area Ga2O3 P-N diodes with a current over 1 A and a higher yield of BV are fabricated to evaluate the JTE's capacitance and switching characteristics. The JTE accounts for only ~11% of the junction capacitance of this 1 A diode, and the percentage is expected to be even smaller for higher-current diodes. The turn-on/off speed and reverse recovery time of the diode are comparable to commercial SiC Schottky barrier diodes under the on-wafer switching test. These results show the viability of NiO JTE for enabling a fast switching speed in high-voltage Ga2O3 power devices. Fourthly, the fabricated large-area Ga2O3 diodes are packaged using silver sintering as the die attach. The sintered silver joint has higher thermal conductivity (kT) and better reliability as compared to the solder joint. Due to the low kT of Ga2O3 material, junction-side-cooled (JSC) packaging configuration is necessary for Ga2O3 devices. For the packaged device, its junction-to-case thermal resistance (RθJC) is measured in the bottom-side-cooled (BSC) and junction-side-cooled (JSC) configuration by the transient dual interface method according to the JEDEC 51-14 standard. The RθJC of the junction- and bottom-cooled Ga2O3 SBD is measured to be 0.5 K/W and 1.43 K/W, respectively. The former RθJC is lower than that of similarly-rated commercial SiC SBDs. This manifests the significance of JSC packaging for the thermal management of Ga2O3 devices. Fifthly, to evaluate the electrothermal robustness of the packaged Ga2O3 devices, the surge current capability of JSC packaged Ga2O3 SBDs are measured. The Ga2O3 SBDs with proper packaging show high surge current capabilities. The double-side-cooled (DSC) large-area Ga2O3 SBDs can sustain a peak surge current over 60 A, with a ratio between the peak surge current and the rated current superior to that of similarly-rated commercial SiC SBDs. These results show the excellent ruggedness of Ga2O3 power devices. Finally, a Ga2O3 integrated diode module consisting of four single-diode sub-modules is designed and fabricated. For many power electronics applications, high current is desired; however, for emerging semiconductors, the current upscaling is difficult by directly increasing the device area because of the limitation of heat extraction capability and the limited material/processing yield. Here we explore the paralleling of multiple Ga2O3 P-N diodes to increase the current level. For each sub-module, the JSC packaging structure is used for heat extraction, and a metal post is sintered to the anode for electric field (E-field) management. RθJC is measured to be 1 W/K for each sub-module. On-board double-pulsed test is performed for both the sub-module and the full module. The sub-module and full module demonstrate 400 V, 10 A and 150 V, 70 A switching capabilities, respectively. This is the first demonstration of Ga2O3 power module and shows a promising approach to upscale of the power level of Ga2O3 power electronics. In addition to Ga2O3 device study, a research is conducted to explore the chip size (Achip) minimization for wide-bandgap (WBG) and ultra-wide bandgap (UWBG) power devices. Achip optimization is particularly critical for WBG and UWBG power devices and modules due to the high material cost. This work presents a new, holistic, electrothermal approach to optimize Achip for a given set of target specifications including BV, conduction current (I0), and switching frequency (f). The conduction and switching losses of the device are considered, as well as the heat dissipation in the chip and its package. For a given BV and I0, the optimal Achip, Wdr, and Ndr show strong dependence on f and thermal management. Our approach offers more accurate cost analysis and design guidelines for power modules. In summary, this dissertation covers the design, fabrication, characterization, and packaging of Ga2O3 Schottky and P-N diodes, with the aim to advance Ga2O3 devices to power electronics applications. This dissertation addresses many knowledge gaps on Ga2O3 devices, including the voltage upscaling (ET), current upscaling (large-area device fabrication, packaging, and thermal management), and their concurrence (module demonstration), as well as the circuit-level switching characterizations.
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    Thermal management and packaging of wide and ultra-wide bandgap power devices: a review and perspective
    Qin, Yuan; Albano, Benjamin; Spencer, Joseph; Lundh, James Spencer; Wang, Boyan; Buttay, Cyril; Tadjer, Marko; DiMarino, Christina; Zhang, Yuhao (IOP Publishing, 2023-03)
    Power semiconductor devices are fundamental drivers for advances in power electronics, the technology for electric energy conversion. Power devices based on wide-bandgap (WBG) and ultra-wide bandgap (UWBG) semiconductors allow for a smaller chip size, lower loss and higher frequency compared with their silicon (Si) counterparts, thus enabling a higher system efficiency and smaller form factor. Amongst the challenges for the development and deployment of WBG and UWBG devices is the efficient dissipation of heat, an unavoidable by-product of the higher power density. To mitigate the performance limitations and reliability issues caused by self-heating, thermal management is required at both device and package levels. Packaging in particular is a crucial milestone for the development of any power device technology; WBG and UWBG devices have both reached this milestone recently. This paper provides a timely review of the thermal management of WBG and UWBG power devices with an emphasis on packaged devices. Additionally, emerging UWBG devices hold good promise for high-temperature applications due to their low intrinsic carrier density and increased dopant ionization at elevated temperatures. The fulfillment of this promise in system applications, in conjunction with overcoming the thermal limitations of some UWBG materials, requires new thermal management and packaging technologies. To this end, we provide perspectives on the relevant challenges, potential solutions and research opportunities, highlighting the pressing needs for device-package electrothermal co-design and high-temperature packages that can withstand the high electric fields expected in UWBG devices.