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    Method and system for overloaded array processing

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    6868133.pdf (799.1Kb)
    Downloads: 42
    Publication Date
    2005-03-15
    Filing Date
    2001-05-15
    Inventor
    Hicks, James E. Jr.
    Boyle, Robert J.
    Bayram, Saffet
    Reed, Jeffrey H.
    Metadata
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    Abstract
    According to the present invention, a method and system for array processing are disclosed. Signals transmitting a symbol set are received. A dominant signal set for each signal, which includes dominant signals that interfere with the signal, is determined. A trellis, which includes paths that represent possible symbol sets, is constructed from the dominant signal sets. An optimal path from the trellis is selected, and the symbol set represented by the optimal path is determined.
    Assignee
    Virginia Tech Intellectual Properties, Inc.
    Patent Number
    6868133
    Application Number
    9858316
    Source URL
    http://pimg-fpiw.uspto.gov/fdd/33/681/068/0.pdf
    Primary/U.S. Class
    375/341
    Other/U.S. Class
    714/792
    CPC Class
    H04B7/082
    H04B7/086
    Patent Type
    utility
    URI
    http://hdl.handle.net/10919/72505
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    • Virginia Tech Patents [687]

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