A Linear RF Power Amplifier with High Efficiency for Wireless Handsets

dc.contributor.authorRefai, Wael Yahiaen
dc.contributor.committeechairDavis, William A.en
dc.contributor.committeememberKohler, Werner E.en
dc.contributor.committeememberHudait, Mantu K.en
dc.contributor.committeememberManteghi, Majiden
dc.contributor.committeememberGuido, Louis J.en
dc.contributor.departmentElectrical and Computer Engineeringen
dc.date.accessioned2014-03-14T08:00:16Zen
dc.date.available2014-03-14T08:00:16Zen
dc.date.issued2014-03-13en
dc.description.abstractThis research presents design techniques for a linear power amplifier with high efficiency in wireless handsets. The power amplifier operates with high efficiency at the saturated output power, maintains high linearity with enhanced efficiency at back-off power levels, and covers a broadband frequency response. The amplifier is thus able to operate in multiple modes (2G/2.5G/3G/4G). The design techniques provide contributions to current research in handset power amplifiers, especially to the converged power amplifier architecture, to reduce the number of power amplifiers within the handset while covering all standards and frequency bands around the globe. Three main areas of interest in power amplifier design are investigated: high power efficiency; high linearity; and broadband frequency response. Multiple techniques for improving the efficiency are investigated with the focus on maintaining linear operation. The research applies a new technique to the handset industry, class-J, to improve the power efficiency while avoiding the practical issues that hinder the typical techniques (class-AB and class-F). Class-J has been implemented using GaN FET in high power applications. To our knowledge, this work provides the first implementation of class-J using GaAs HBT in a handset power amplifier. The research investigates the linearity, and the nature and causes of nonlinearities. Multiple concepts for improving the linearity are presented, such as avoiding odd-degree harmonics, and linearizing the relationship between the output current and the input voltage of the amplifier at the fundamental frequency. The concept of bias depression in HBT transistors is introduced with a bias circuit that reduces the bias-offset effect to improve linearity at high output power. A design methodology is presented for broadband matching networks, including the component loss. The methodology offers a quick and accurate estimation of component values, giving more degrees of freedom to meet the design specifications. It enables a trade-off among high out-of-band attenuation, number/size of components, and power loss within the network. Although the main focus is handset power amplifiers, most of the developed techniques can be applied to a wide range of power amplifiers.en
dc.description.degreePh. D.en
dc.format.mediumETDen
dc.identifier.othervt_gsexam:2340en
dc.identifier.urihttp://hdl.handle.net/10919/25886en
dc.publisherVirginia Techen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectpower amplifieren
dc.subjectpower efficiencyen
dc.subjectlinearityen
dc.subjectbroadbanden
dc.subjectmatching networken
dc.subjectimpedance transformationen
dc.subjectconverged power amplifieren
dc.subjectwireless handseten
dc.subjectclass-Jen
dc.subjectGaAs HBT.en
dc.titleA Linear RF Power Amplifier with High Efficiency for Wireless Handsetsen
dc.typeDissertationen
thesis.degree.disciplineElectrical Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.leveldoctoralen
thesis.degree.namePh. D.en
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