Automatic Generation of Efficient Parallel Streaming Structures for Hardware Implementation

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dc.contributor.authorKoehn, Thaddeus E.en
dc.contributor.committeechairAthanas, Peter M.en
dc.contributor.committeememberErnst, Joseph M.en
dc.contributor.committeememberDietrich, Carl B.en
dc.contributor.committeememberBuehrer, R. Michaelen
dc.contributor.committeememberMcGwier, Robert W.en
dc.contributor.departmentElectrical and ComputerEngineeringen
dc.date.accessioned2018-05-25T06:00:20Zen
dc.date.available2018-05-25T06:00:20Zen
dc.date.issued2016-11-30en
dc.description.abstractDigital signal processing systems demand higher computational performance and more operations per second than ever before, and this trend is not expected to end any time soon. Processing architectures must adapt in order to meet these demands. The two techniques most prevalent for achieving throughput constraints are parallel processing and stream processing. By combining these techniques, significant throughput improvements have been achieved. These preliminary results apply to specific applications, and general tools for automation are in their infancy. In this dissertation techniques are developed to automatically generate efficient parallel streaming hardware architectures.en
dc.description.degreePh. D.en
dc.format.mediumETDen
dc.identifier.othervt_gsexam:9096en
dc.identifier.urihttp://hdl.handle.net/10919/83391en
dc.publisherVirginia Techen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectStreamingen
dc.subjectField programmable gate arraysen
dc.subjectHardwareen
dc.subjectDigital Signal Processingen
dc.subjectPermutationen
dc.titleAutomatic Generation of Efficient Parallel Streaming Structures for Hardware Implementationen
dc.typeDissertationen
thesis.degree.disciplineElectrical Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.leveldoctoralen
thesis.degree.namePh. D.en

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