Adaptive bus voltage positioning for two-stage voltage regulators
| dc.contributor.assignee | Virginia Tech Intellectual Properties, Inc. | en |
| dc.contributor.inventor | Lee, Fred C. | en |
| dc.contributor.inventor | Xu, Ming Gang | en |
| dc.contributor.inventor | Wei, Jia | en |
| dc.date.accessed | 2016-08-19 | en |
| dc.date.accessioned | 2016-08-24T17:54:37Z | en |
| dc.date.available | 2016-08-24T17:54:37Z | en |
| dc.date.filed | 2004-02-20 | en |
| dc.date.issued | 2007-01-09 | en |
| dc.description.abstract | Alteration of voltage input to a voltage regulator output stage from a V<sub>bus </sub>regulator stage in a two-stage voltage regulator provides optimal V<sub>bus </sub>voltage placement for a wide range of current loads to increase voltage regulator efficiency and is particularly suited to CPUs having power-saving sleep modes of operation. An optimal voltage is selected or developed in response to information concerning operational mode or current consumption of the powered device. As a perfecting feature of one embodiment of the invention in which a discrete V<sub>bus </sub>voltage is selected based on operational mode, the selected voltage is adjusted to further optimize the matching of the V<sub>bus </sub>voltage placement to the load and provides a continuous range of voltages. In a second embodiment the entire V<sub>bus </sub>positioning function is performed in response to current load information. A feed-forward arrangement is provided to avoid transient spikes as the V<sub>bus </sub>voltage placement is altered. | en |
| dc.format.mimetype | application/pdf | en |
| dc.identifier.applicationnumber | 10781931 | en |
| dc.identifier.patentnumber | 7161335 | en |
| dc.identifier.uri | http://hdl.handle.net/10919/72546 | en |
| dc.identifier.url | http://pimg-fpiw.uspto.gov/fdd/35/613/071/0.pdf | en |
| dc.language.iso | en_US | en |
| dc.publisher | United States Patent and Trademark Office | en |
| dc.subject.cpc | H02M3/156 | en |
| dc.subject.cpc | H02M2001/0019 | en |
| dc.subject.cpc | H02M2001/0032 | en |
| dc.subject.cpc | H02M2001/007 | en |
| dc.subject.cpc | Y02B70/16 | en |
| dc.subject.uspc | 323/266 | en |
| dc.subject.uspcother | 323/282 | en |
| dc.title | Adaptive bus voltage positioning for two-stage voltage regulators | en |
| dc.type | Patent | en |
| dc.type.dcmitype | Text | en |
| dc.type.patenttype | utility | en |
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