Sframe: An Efficient System for Detailed DC Simulation of Bipolar Analog Integrated Circuits Using Continuation Methods
Files
TR Number
TR-92-52
Date
1992
Journal Title
Journal ISSN
Volume Title
Publisher
Department of Computer Science, Virginia Polytechnic Institute & State University
Abstract
In this paper we describe an experimental system called sframe which is being incorporated into the design for manufacturability initiative at the Reading Works of AT&T Bell Laboratories. Our system is able to perform detailed and accurate DC analyses of integrated circuits containing several hundred transistors to be fabricated in a relatively complex junction isolated complementary technology.