2T-1C ferroelectric random access memory and operation method thereof

A 2T-1C FRAM, each cell of which includes two transistors and one ferroelectric capacitor so that the “charging” and “discharging” of the ferroelectric capacitor used in conjunction with the p-n junction of the two transistors performs write/read operations without switching thereby avoiding degradation problems such as fatigue and imprint in the 2T-1C FRAM.