Next Generation Frequency Disturbance Recorder Design and Timing Analysis

In recent years, the subject of wide-area synchronized measurements has gained a significant amount of attention from the power system researchers. All of this started with the introduction of the Phasor Measurement Unit (PMU), which added a new perspective in the field of wide-area measurement systems (WAMS). With the ever evolving technologies over the years and the need for a more cost effective solution for synchronized frequency measurements, the Frequency Monitoring Network (FNET) was developed and introduced by the Power IT laboratory at Virginia Tech. The FNET is comprised of many Frequency Disturbance Recorders (FDR) geographically distributed throughout the United States. The FDR is a dedicated data acquisition device deployed at the distribution level, which allows for a lower cost and easily deployable WAMS solution. With Internet connectivity and GPS timing synchronization, the FDR provides high accuracy frequency, voltage magnitude and voltage angle data to the remote servers.

Although the current FDR design is up to the standard in terms of the measurement accuracy and portability, it is of interest to further the research into alternative architectures and leverage the ever advancing technologies in high speed computing. One of the purposes of this dissertation is to present novel design options for a new generation of FDR hardware design. These design options will allow for more flexibility and to lower reliance on some vendor specific components. More importantly, the designs seek to allow for more computation processing capabilities so that more accurate frequency and angle measurements may be obtained.

Besides the fact that the accuracy of frequency and angle measurement is highly dependent on the hardware and the algorithm, much can be said about the role of timing synchronization and its effects on accurate measurements. Most importantly, the accuracy of the frequency and angle estimation is highly dependent on the sampling time of local voltage angles. The challenges to accurate synchronized sampling are two folds. One challenge has to do with the inherent fallbacks of the GPS receiver, which is relatively high cost and limited in availability when the satellite signal is degraded. The other challenge is related to the timing inaccuracies of the sampling pulses, which is attributed to the remainder that results from the imperfect division of the processor counter. This dissertation addresses these issues by introducing the implementation of the high sensitivity (indoor) GPS and network timing synchronization, which aims to increase the availability of frequency measurements in locations that would not have been possible before. Furthermore, a high accuracy timing measurement system is introduced to characterize the accuracy and stability of the conventional crystal oscillator. To this end, a new method is introduced in close association with some prior work in generating accurate sampling time for FDR. Finally, a new method is introduced for modeling the FDR based on the sampling time measurements and some results are presented in order to motivate for more research in this area.