An efficiency rating tool for process-level VHDL behavioral models

dc.contributor.authorWicks, John A.en
dc.contributor.committeechairArmstrong, James R.en
dc.contributor.committeememberCyre, Walling R.en
dc.contributor.committeememberMidkiff, Scott F.en
dc.contributor.committeememberGray, F. Gailen
dc.contributor.committeememberParry, Charles J.en
dc.contributor.departmentElectrical Engineeringen
dc.date.accessioned2014-03-14T21:12:03Zen
dc.date.adate2008-06-06en
dc.date.available2014-03-14T21:12:03Zen
dc.date.issued1996en
dc.date.rdate2008-06-06en
dc.date.sdate2008-06-06en
dc.description.abstractDue to the great complexity of VHDL models that are created today, the amount of processing time required to simulate these models and the amount of labor required to develop these models have become critical issues. The amount of processing time required to simulate a model can be directly influenced by the efficient use of VHDL concepts in creating the model. This dissertation presents an approach to aiding the modeler in the development of more efficient VHDL models. This is done by measuring the simulation efficiency of process-level VHDL behavioral models. Research in the determination of what VHDL constructs and modeling styles are most efficient is presented. The development and use of a tool that parses VHDL behavioral models and reveals the efficiency of the code in the form of a numerical efficiency rating is also presented.en
dc.description.degreePh. D.en
dc.format.extentx, 144 leavesen
dc.format.mediumBTDen
dc.format.mimetypeapplication/pdfen
dc.identifier.otheretd-06062008-151205en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-06062008-151205/en
dc.identifier.urihttp://hdl.handle.net/10919/37990en
dc.language.isoenen
dc.publisherVirginia Techen
dc.relation.haspartLD5655.V856_1996.W553.pdfen
dc.relation.isformatofOCLC# 36678655en
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectVHDLen
dc.subjectstatic ratingen
dc.subjectdynamic ratingen
dc.subjectefficiencyen
dc.subjectsimulation performanceen
dc.subject.lccLD5655.V856 1996.W553en
dc.titleAn efficiency rating tool for process-level VHDL behavioral modelsen
dc.typeDissertationen
dc.type.dcmitypeTexten
thesis.degree.disciplineElectrical Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.leveldoctoralen
thesis.degree.namePh. D.en

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