Implanted Guard Ring Edge Termination With Avalanche Capability for Vertical GaN Devices

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dc.contributor.authorWang, Yifanen
dc.contributor.authorPorter, M.en
dc.contributor.authorXiao, M.en
dc.contributor.authorLu, A.en
dc.contributor.authorYee, N.en
dc.contributor.authorKravchenko, I.en
dc.contributor.authorSrijanto, B.en
dc.contributor.authorCheng, K.en
dc.contributor.authorWong, H. Y.en
dc.contributor.authorZhang, Y.en
dc.date.accessioned2024-01-25T13:01:16Zen
dc.date.available2024-01-25T13:01:16Zen
dc.date.issued2023-10-13en
dc.description.abstractEdge termination is the key building block in power devices to enable near-ideal, avalanche breakdown voltage (BV). This work presents the design, fabrication, and physics of a GaN guard ring (GR) edge termination formed by selective-area nitrogen implantation through an epitaxial p-GaN layer. The fabrication of this termination only includes a single implantation step that does not require precise control of implant depth, rendering a large process latitude. The selective-area implantation produces p-GaN rings that are separated by the implanted, semi-insulating regions. The number and spacing of the p-type rings are found to determine the BV of the vertical GaN p-n diode. The 16-ring structure enables a BV of 1800 V, being 88% of the theoretical 1-D parallel-plane limit. Avalanche characteristics are observed in devices with a large variety of GR designs. Finally, we present a comprehensive survey on the efficiency, fabrication complexity, real estate, and avalanche capability of various edge termination techniques that have been reported in vertical GaN devices. The high efficiency (among the highest reported in avalanche-capable GaN terminations), simple and robust fabrication process, and uniform avalanche capability make this implanted GR a promising edge termination for high-voltage GaN devices.en
dc.description.versionPublished versionen
dc.format.extentPages 1-7en
dc.format.mimetypeapplication/pdfen
dc.identifier.doihttps://doi.org/10.1109/TED.2023.3321010en
dc.identifier.eissn1557-9646en
dc.identifier.issn0018-9383en
dc.identifier.issue99en
dc.identifier.orcidZhang, Yuhao [0000-0001-6350-4861]en
dc.identifier.urihttps://hdl.handle.net/10919/117677en
dc.identifier.volumePPen
dc.language.isoenen
dc.publisherIEEEen
dc.rightsCreative Commons Attribution 4.0 Internationalen
dc.rights.urihttp://creativecommons.org/licenses/by/4.0/en
dc.titleImplanted Guard Ring Edge Termination With Avalanche Capability for Vertical GaN Devicesen
dc.title.serialIEEE Transactions on Electron Devicesen
dc.typeArticle - Refereeden
dc.type.dcmitypeTexten
dc.type.otherJournal Articleen
pubs.organisational-group/Virginia Techen
pubs.organisational-group/Virginia Tech/Engineeringen
pubs.organisational-group/Virginia Tech/Engineering/Electrical and Computer Engineeringen
pubs.organisational-group/Virginia Tech/All T&R Facultyen
pubs.organisational-group/Virginia Tech/Engineering/COE T&R Facultyen
pubs.organisational-group/Virginia Tech/Graduate studentsen
pubs.organisational-group/Virginia Tech/Graduate students/Doctoral studentsen

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