Monolithically Cointegrated Tensile Strained Germanium and InxGa1−xAs FinFETs for Tunable CMOS Logic

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dc.contributor.authorJoshi, Rutwiken
dc.contributor.authorKarthikeyan, Senguntharen
dc.contributor.authorHudait, Mantu K.en
dc.date.accessioned2023-02-17T20:47:34Zen
dc.date.available2023-02-17T20:47:34Zen
dc.date.issued2022-08-01en
dc.date.updated2023-02-17T19:38:49Zen
dc.description.abstractIn this article, we have evaluated the merits of monolithically cointegrated alternate channel complementary metal-oxide-semiconductor (CMOS) device architecture, utilizing tensile strained germanium (ε-Ge) for the p-channel FinFET and variable indium (In) compositional InxGa1−xAs (0.10 ≤ x ≤ 0.53) for the n-channel FinFET. The device simulation models were calibrated using the experimental results of Ge and InGaAs FinFETs and subsequently transferred to the cointegrated Ge and InxGa1−x As structure while keeping the device simulation parameters fixed. The device parameters, such as VT, Ion, Ioff, and subthreshold-swing (SS), were determined for identical fin dimensions for n- and p-channel FinFETs as a function of In composition that alters the tensile strain in Ge. These parameters are controllable during the heteroepitaxial growth by varying In composition in InxGa1−xAs. ε-Ge p-FinFET is shown to be superior in terms of SS and Ion/Ioff ratio compared with other competing architectures. The cointegrated architecture of CMOS inverter exhibited an optimum performance over a range of In compositions from 20% to 40% while driving fan-out fan-out 1 (FO-1) and FO-4 load configurations. In addition, the CMOS inverter with symmetric rise and fall times as well as noise-immune functionality demonstrated 150 GHz of operating frequency with 30-nW total power dissipation at 20% In composition, and hence a superior power-delay-product comparable with International Technology Roadmap for Semiconductors (ITRS) standards. Moreover, the three-stage CMOS ring oscillator performance was evaluated with various In compositions to be stable and power efficient. Thus, the cointegrated approach has a potential to: 1) simplify large-scale CMOS integration and 2) be compatible with optoelectronic materials.en
dc.description.versionAccepted versionen
dc.format.extentPages 4175-4182en
dc.format.mimetypeapplication/pdfen
dc.identifier.doihttps://doi.org/10.1109/TED.2022.3181112en
dc.identifier.eissn1557-9646en
dc.identifier.issn0018-9383en
dc.identifier.issue8en
dc.identifier.orcidHudait, Mantu [0000-0002-9789-3081]en
dc.identifier.urihttp://hdl.handle.net/10919/113862en
dc.identifier.volume69en
dc.language.isoenen
dc.publisherIEEEen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.titleMonolithically Cointegrated Tensile Strained Germanium and In<inf>x</inf>Ga<inf>1−x</inf>As FinFETs for Tunable CMOS Logicen
dc.title.serialIEEE Transactions on Electron Devicesen
dc.typeArticle - Refereeden
dc.type.dcmitypeTexten
dc.type.otherJournal Articleen
pubs.organisational-group/Virginia Techen
pubs.organisational-group/Virginia Tech/Engineeringen
pubs.organisational-group/Virginia Tech/Engineering/Electrical and Computer Engineeringen
pubs.organisational-group/Virginia Tech/All T&R Facultyen
pubs.organisational-group/Virginia Tech/Engineering/COE T&R Facultyen

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