Design Considerations and Quantum Confinement Effect in Monolithic ϵ-Ge/InxGa1-xAs Nanoscale FinFETs Down to N5 Node

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dc.contributor.authorJoshi, Rutwiken
dc.contributor.authorKarthikeyan, Senguntharen
dc.contributor.authorHudait, Mantu K.en
dc.date.accessioned2023-02-21T18:09:28Zen
dc.date.available2023-02-21T18:09:28Zen
dc.date.issued2022-12-01en
dc.date.updated2023-02-17T19:18:22Zen
dc.description.abstractIn this work, we have studied the effect of material parameters (indium (In) composition and doping), geometrical parameters (channel length L, fin width W, aspect ratio AR), and quantum confinement (QC) on the performance and operability of a ε-Ge/InxGa1-xAs hybrid CMOS system. In this system, the In compositional InxGa1-xAs and tensile strained Ge (ε-Ge) grown on the InxGa1-xAs layer, were used as n- and p-channel FinFETs, respectively. The In composition in InxGa1-xAs layer (lattice matched with graded InxAl1-xAs buffer) determines the amount of tensile strain in Ge. This hybrid system utilizes the benefits of metamorphic (InxGa1-xAs/InxAl1-xAs) as well as pseudomorphic (ε- Ge/InxGa1-xAs) heteroepitaxy to create high performance tunable complementary devices, suitable for 0.5 V CMOS operation. The device metrics such as, threshold voltage, on-current (ION), offcurrent (IOFF), subthreshold-swing (SS), and drain induced barrier lowering (DIBL), and their dependence on material and geometrical parameters were evaluated using self-consistent analytical solvers scaled down to the N5 node. At these scaled dimensions, this hybrid system demonstrated ultra-low leakage current and SS for the n-FinFET and p-FinFET of 10 pA/μm, 27 nA/μm, 85 mV/dec and 95 mV/dec, respectively. With the effect of QC, we identify a transition fin width (WT) associated with scaling of alternate channel FinFETs, at which the performance is optimum and below WT, the benefits of scaling are diminished. Moreover, this hybrid system has a potential to find applications in optoelectronic and RF systems as well as high-performance computing.en
dc.description.versionAccepted versionen
dc.format.extentPages 6616-6623en
dc.format.mimetypeapplication/pdfen
dc.identifier.doihttps://doi.org/10.1109/TED.2022.3212337en
dc.identifier.eissn1557-9646en
dc.identifier.issn0018-9383en
dc.identifier.issue12en
dc.identifier.orcidHudait, Mantu [0000-0002-9789-3081]en
dc.identifier.urihttp://hdl.handle.net/10919/113892en
dc.identifier.volume69en
dc.language.isoenen
dc.publisherIEEEen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.titleDesign Considerations and Quantum Confinement Effect in Monolithic ϵ-Ge/In<sub>x</sub>Ga<sub>1-x</sub>As Nanoscale FinFETs Down to N5 Nodeen
dc.title.serialIEEE Transactions on Electron Devicesen
dc.typeArticle - Refereeden
dc.type.dcmitypeTexten
dc.type.otherJournal Articleen
pubs.organisational-group/Virginia Techen
pubs.organisational-group/Virginia Tech/Engineeringen
pubs.organisational-group/Virginia Tech/Engineering/Electrical and Computer Engineeringen
pubs.organisational-group/Virginia Tech/All T&R Facultyen
pubs.organisational-group/Virginia Tech/Engineering/COE T&R Facultyen

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