High-Frequency and High-Performance VRM Design for the Next Generations of Processors

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dc.contributor.authorYao, Kaiweien
dc.contributor.committeechairLee, Fred C.en
dc.contributor.committeememberBoroyevich, Dushanen
dc.contributor.committeememberHuang, Alex Q.en
dc.contributor.committeememberLiu, Yiluen
dc.contributor.committeememberLu, Guo-Quanen
dc.contributor.departmentElectrical and Computer Engineeringen
dc.date.accessioned2011-08-22T19:00:46Zen
dc.date.adate2004-04-29en
dc.date.available2011-08-22T19:00:46Zen
dc.date.issued2004-04-22en
dc.date.rdate2004-04-29en
dc.date.sdate2004-04-27en
dc.description.abstractIt is perceived that Moore's Law will prevail at least for the next decade with the continuous advancement of processing technologies for integrated circuits. According to Intel's roadmap, over one billion transistors will be integrated in one processor by the year 2010; the processor's clock speed will approach 15 GHz; the core static currents will increase up to 200 A; the dynamic current slew rate will rise up to 250 A/ns; and the core voltage will decrease to 0.8 V. The rapid advancement of processor technology has posed stringent challenges to power management for both an efficient power delivery and an accurate voltage regulation. The primary objectives of this dissertation are to understand the fundamental limitations of the state-of-the-art solution for the power management, and hence to support possible solutions for meeting the power requirement of the next generations of processors. First, today's voltage-regulator module (VRM) design, which is based on the multiphase interleaving buck topology, is thoroughly analyzed. The analysis results of the control bandwidths versus the VRM transient voltage spikes highlight the trend of high-frequency VRM design for smaller size and faster transient response. Based on the concept of achieving constant VRM output impedance, design guidelines are proposed for different kinds of control methods. However, the high switching-related losses in the conventional multiphase buck converter limit its further applications. This dissertation proposes a series of new topologies in order to break through the barriers by applying an inductor-coupling or autotransformer structure to reduce the switching-related losses by extending the duty cycle. Then, this dissertation pushes the topology innovation further by introducing soft-switching quasi-resonant converters for the VRM design. The combination of the quasi-resonant and active-clamped concepts derives a family of new converters, which can eliminate all the switching and body-diode losses. The experimental results at 1-2MHz switching frequencies prove that the proposed solutions for the VRM design can realize very high efficiency and high power density.en
dc.description.degreePh. D.en
dc.format.mediumETDen
dc.identifier.otheretd-04272004-215842en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-04272004-215842en
dc.identifier.urihttp://hdl.handle.net/10919/11151en
dc.publisherVirginia Techen
dc.relation.haspartkyao_dissertation.pdfen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjecthigh frequencyen
dc.subjectpower managementen
dc.subjectvoltage regulator moduleen
dc.titleHigh-Frequency and High-Performance VRM Design for the Next Generations of Processorsen
dc.typeDissertationen
thesis.degree.disciplineElectrical and Computer Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.leveldoctoralen
thesis.degree.namePh. D.en

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