VTechWorks staff will be away for the Thanksgiving holiday beginning at noon on Wednesday, November 27, through Friday, November 29. We will resume normal operations on Monday, December 2. Thank you for your patience.
 

Modeling reconfiguration algorithms for regular architecture

Simple item page
dc.contributor.authorDeBrunner, Linda Sumnersen
dc.contributor.committeechairGray, Festus Gailen
dc.contributor.committeememberArmstrong, James R.en
dc.contributor.committeememberBoisen, Monte B. Jr.en
dc.contributor.committeememberNunnally, Charles E.en
dc.contributor.committeememberVanLandingham, Hugh F.en
dc.contributor.departmentElectrical Engineeringen
dc.date.accessioned2014-03-14T20:17:19Zen
dc.date.adate2005-10-12en
dc.date.available2014-03-14T20:17:19Zen
dc.date.issued1991-07-05en
dc.date.rdate2012-07-11en
dc.date.sdate2005-10-12en
dc.description.abstractThree models are proposed to evaluate and design distributed reconfigurable systems for fault tolerant, highly reliable applications. These models serve as valuable tools for developing fault tolerant systems. In each model, cells work together in parallel to change the global structure through a series of separate actions. In the Local Supervisor Model (LSM), selected cells guide the reconfiguration process. In the Tessellation Automata Model (TAM), each cell determines its next state based on its state and its neighbors' states, and communicates its state information to its neighbors. In the Interconnected Finite State Machine Model (IFS:MM:), each cell determines its next state and outputs based on its state and its inputs. The hierarchical nature of the TAM and IFSMM provides advantages in evaluating, comparing, and designing systems. The use of each of these models in describing systems is demonstrated. The IFSMM: is emphasized since it is the most versatile of the three models. The IFSMM: is used to identify algorithm weaknesses and improvements, compare existing algorithms, and develop a novel design for a reconfigurable hypercube.en
dc.description.degreePh. D.en
dc.format.extentxiii, 564 leavesen
dc.format.mediumBTDen
dc.format.mimetypeapplication/pdfen
dc.identifier.otheretd-10122005-134433en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-10122005-134433/en
dc.identifier.urihttp://hdl.handle.net/10919/29254en
dc.language.isoenen
dc.publisherVirginia Techen
dc.relation.haspartLD5655.V856_1991.D427.pdfen
dc.relation.isformatofOCLC# 24990151en
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subject.lccLD5655.V856 1991.D427en
dc.subject.lcshFault-tolerant computingen
dc.titleModeling reconfiguration algorithms for regular architectureen
dc.typeDissertationen
dc.type.dcmitypeTexten
thesis.degree.disciplineElectrical Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.leveldoctoralen
thesis.degree.namePh. D.en

Files

Original bundle
Now showing 1 - 1 of 1
Thumbnail Image
Name:
LD5655.V856_1991.D427.pdf
Size:
13.5 MB
Format:
Adobe Portable Document Format
Description:
Download

Collections

Doctoral Dissertations