Center for Power Electronics Systems

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2012 CPES Annual Report
Center for Power Electronics Systems (Virginia Tech. Center for Power Electronics Systems, 2012)
The Center for Power Electronics Systems at Virginia Tech is a research center dedicated to improving electrical power processing and distribution that impact systems of all sizes – from battery – operated electronics to vehicles to regional and national electrical distribution systems. Our mission is to provide leadership through global collaborative research and education for creating advanced electric power processing systems of the highest value to society. CPES, with annual research expenditures about $4-5 million US dollars, has a worldwide reputation for its research advances, its work with industry, and its many talented graduates. From its background as an Engineering Research Center for the National Science Foundation during 1998 - 2008, CPES has continued to work towards making electric power processing more efficient and more exact in order to reduce energy consumption. Power electronics is the “enabling infrastructure technology” that promotes the conversion of electrical power from its raw form to the form needed by machines, motors and electronic equipment. Advances in power electronics can reduce power conversion loss and in turn increase energy efficiency of equipment and processes using electrical power. This results in increased industrial productivity and product quality. With widespread use of power electronics technology, the United States would be able to cut electrical energy consumption by 33 percent. This energy savings in the United States alone is estimated to be the equivalent of output from 840 fossil fuel based generating plants. This savings would result in enormous economic, environmental and social benefits.
2013 CPES Annual Report
Center for Power Electronics Systems; Uncork-it, Inc. (Virginia Tech. Center for Power Electronics Systems, 2013)
The CPES industrial consortium is designed to cultivate connectivity among researchers in academia and industry, as well as create synergy within the network of industry members. The CPES industrial consortium offers: The best mechanism to stay abreast of technological developments in power electronics; The ideal forum for networking with leadingedge companies and top-notch researchers; The CPES connection provides the competitive edge to industry members via: Access to state-of-the-art facilities, faculty expertise, top-notch students; Leveraged research funding of over $4-10 million per year; Industry influence via Industry Advisory Board and research champions; Intellectual properties with early access for Principal Plus and Principal members via CPES IPPF (Intellectual Property Protection Fund); Technology transfer made possible via special access to the Center’s multi-disciplinary team of researchers, and resulting publications, presentations and intellectual properties; Continuing education opportunities via professional short courses offered at a significant discount. The CPES industrial consortium offers the ideal forum for networking with leading-edge companies and top-notch researchers and provides the best mechanism to stay abreast of technological developments in power electronics.
2014 CPES Annual Report
Center for Power Electronics Systems; Uncork-it, Inc. (Virginia Tech. Center for Power Electronics Systems, 2014)
Over the past two decades, CPES has secured research funding from major industries, such as GE, Rolls-Royce, Boeing, Alstom, ABB, Toyota, Nissan, Raytheon, and MKS, as well as from government agencies including the NSF, DOE, DARPA, ONR, U.S. Army, and the U.S. Air Force, in research pursuing high-density system design. CPES has developed unique high-temperature packaging technology critical to the future powerelectronic industry. In the HDI mini-consortium, the goal of high power density will be pursued following two coupled paths, both leveraging the availability of wide-bandgap power semiconductor, as well as high-temperature passive components and ancillary functions. The switching frequency will be pushed as high as component technologies, thermal management, and reliability permit. At the same time, the maximum component temperatures will be pushed as high as component technologies, thermal management, and reliability permit. The emergence of wide‐bandgap semiconductors such as Silicon Carbide (SiC) and Gallium Nitride (GaN) makes it possible to realize power switches that operate at frequency beyond 5 MHz and temperature beyond 200° C. As the switching frequency increases, switching noise is shifted to higher frequency and can be filtered with small passive components, leading to improved power density. Higher operating temperatures enable increased power density and applications under harsh environments, such as military systems, transportation systems, and outdoor industrial and utility systems.
2015 CPES Annual Report
Center for Power Electronics Systems; Uncork-it, Inc. (Virginia Tech. Center for Power Electronics Systems, 2015)
In its efforts to develop power processing systems to take electricity to the next step, CPES has developed research expertise encompassing five technology areas: (1) power conversion technologies and architectures; (2) power electronics components; (3) modeling and control; (4) EMI and power quality; (5) high density integration. These technology areas target applications that include: (1) Power management for information and communications technology; (2) Point-of-load conversion for power supplies; (3) Vehicular power conversion systems; (4) Renewable energy systems. In 2015, CPES sponsored research totaled approximately $2.2 million. The following abstracts provide a quick insight to the current research efforts.
2016 CPES Annual Report
Center for Power Electronics Systems; Uncork-it, Inc. (Virginia Tech. Center for Power Electronics Systems, 2016)
In its effort to develop power processing systems to take electricity to the next step, CPES has cultivated research expertise encompassing five technology areas: (1) power conversion technologies and architectures; (2) power electronics components; (3) modeling and control; (4) EMI and power quality; and (5) high density integration. These technology areas target applications that include: (1) Power management for information and communications technology; (2) Point-of-load conversion for power supplies; (3) Vehicular power converter systems; and (4) High-power conversion systems. In 2016, CPES sponsored research totaled approximately $2.1 million. The following abstracts provide a quick insight to the current research efforts.
2017 CPES Annual Report
Center for Power Electronics Systems; Uncork-it, Inc. (Virginia Tech. Center for Power Electronics Systems, 2017)
In its effort to develop power processing systems to take electricity to the next step, CPES has cultivated research expertise encompassing five technology areas: (1) power conversion technologies and architectures; (2) power electronics components; (3) modeling and control; (4) EMI and power quality; and (5) high density integration. These technology areas target applications that include: (1) power management for information and communications technology; (2) point-of-load conversion for power supplies; (3) vehicular power converter systems; and (4) high-power conversion systems. In 2016, CPES sponsored research totaled approximately $2.4 million. The following abstracts provide a quick insight to the current research efforts.
Anti-islanding detection for three-phase distributed generation
(United States Patent and Trademark Office, 2017-04-25)
Wobbling the operating frequency of a phase-locked loop (PLL), preferably by adding a periodic variation is feedback gain or delay in reference signal phase allows the avoidance of any non-detection zone that might occur due to exact synchronization of the phase locked loop operating frequency with a reference signal. If the change in PLL operating frequency is periodic, it can be made of adequate speed variation to accommodate and time requirement for islanding detection or the like when a reference signal being tracked by the PLL is lost. Such wobbling of the PLL operating frequency is preferably achieved by addition a periodic variable gain in a feedback loop and/or adding a periodically varying phase delay in a reference signal and/or PLL output.
Avoiding internal switching loss in soft switching cascode structure device
(United States Patent and Trademark Office, 2017-08-15)
In a cascode switching device, avalanche breakdown of a control transistor and loss of soft switching or zero voltage switching in a high voltage normally-on depletion mode transistor having a negative switching threshold voltage and the corresponding losses are avoided by providing additional capacitance in parallel with a parallel connection of drain-source parasitic capacitance of the control transistor and gate-source parasitic capacitance of the high voltage, normally-on transistor to form a capacitive voltage divider with the drain-source parasitic capacitance of the high voltage, normally-on transistor such that the avalanche breakdown voltage of the control transistor cannot be reached. The increased capacitance also assures that the drain source parasitic capacitance of the high voltage, normally-on transistor is fully discharged before internal turn-on can occur.
Center Program Snapshot (April 2009)
Center for Power Electronics Systems (Virginia Tech. Center for Power Electronics Systems, 2009-04)
With the widespread use of power electronics technology, the United States would be able to cut electrical energy consumption by 33 percent. The energy savings, by today’s measure, is equivalent to the total output of 840 fossil fuel-based generating plants. This would result in enormous economic, environmental and social benefits. The engineers of the Center for Power Electronics Systems (CPES) are working to make electric power processing more efficient and more exact in order to achieve these benefits. The effort requires close collaboration with industry and with researchers across universities and fields of endeavor. Electrification is considered the greatest engineering feat of the 20th century by the National Academy of Engineering. The dream of CPES engineers is to take electricity to the next step and develop power processing systems of the highest value to society.
CPES : 10-Year Progress Report
Center for Power Electronics Systems; Uncork-it, Inc. (Virginia Tech. Center for Power Electronics Systems, 2010-04)
A major strength of CPES is its ability to use a wealth of existing resources and industrial collaboration. Virginia Tech, the University of Wisconsin-Madison (UW), and Rensselaer Polytechnic Institute (RPI) are the nation’s leaders in power electronics and advanced power semiconductor materials and devices. These three universities have combined forces with North Carolina A&T State University (NCA&T) and the University of Puerto Rico-Mayagüez (UPRM), which are institutions with solid reputations in the quality of their undergraduate engineering programs as well as their power electronics and related research. Virginia Tech brings expertise in high-frequency power conversion devices and circuit technologies, power electronics packaging, and systems integration. The University of Wisconsin has expertise in industrial and utility-grade power conversion, electric machines and motor drives, and industrial controls. RPI’s expertise involves novel discrete power semiconductor materials, process techniques, power devices, and smart power ICs. North Carolina A&T contributes knowledge of nonlinear control, neural networks, and fuzzy logic-based intelligent control, and the University of Puerto Rico-Mayagüez has expertise in controls and electric machines. The resources and expertise of researchers from each of these institutions have contributed to the success of the Center. CPES industry members have been the critical key in our success. From the beginning, industry members have been enthusiastic and involved, helping shape goals and contributing to the management of the ERC. Since 1998, CPES research goals have evolved and the collaborations with industry and university researchers have strengthened. CPES succeeded in changing the technology of power electronics, while increasing knowledge and participation in the field. As we graduate from the NSF ERC program, we look forward to building on our global collaboration and changing the way electricity is used.
CPES : Mini-Consortium Brochure
Center for Power Electronics Systems (Virginia Tech. Center for Power Electronics Systems, 2011-04)
The CPES mini-consortium model provides a unique mechanism for all participants in power electronics – including industry competitors – to pool efforts to address their common challenges and develop pre-competitive Advances. Companies and organizations join CPES as a Principal Plus Member and choose the mini-consortium option. Annual membership fees are $50,000. Research results generated within a miniconsortium are shared among its members, and intellectual properties developed under the CPES industry consortium are shared among all Principal-level members as described on the next page. The research and IP benefits are only part of what makes the mini-consortium effective. The distinctive feature of the model is discussion among all participants, which then shapes and guides research toward overcoming the major barriers in the field. Competitive plans and technologies are protected, yet participants can discuss their mutual technical problems. Miniconsortium interactions take place in the quarterly review meetings.
CPES Center Brochure (April 2011)
Center for Power Electronics Systems; Uncork-it, Inc. (Virginia Tech. Center for Power Electronics Systems, 2011-04)
The Center for Power Electronics Systems is a $4 million/year research center dedicated to improving electrical power processing and distribution that impact systems of all sizes –from battery-operated electronics to vehicles to regional and national electrical distribution systems. Our mission is to provide leadership through global collaborative research and education for creating electric processing systems of the highest value to society. CPES has a worldwide reputation for its research advances, work with industry to improve the entire field, and its many talented graduates. From 1998- 2008, CPES served as an Engineering Research Center (ERC) for the NSF. A collaboration of five universities and many industrial firms, the CPES ERC was the largest-ever collaboration of power electronics researchers. During the ERC period, CPES developed the IPEM, a standardized off-the-shelf module that has revolutionized power electronics. Today, we are building on that foundation so that power electronics can fulfill its promise and reduce energy use while helping electronics-based systems grow in capability.
A diffusion-viscous analysis and experimental verification of defect formation in sintered silver bond-line
Xiao, Kewei; Ngo, Khai D. T.; Lu, Guo-Quan (Cambridge University Press, 2014-04-01)
The low-temperature joining technique (LTJT) by silver sintering is being implemented by major manufacturers of power electronic devices and modules for bonding power semiconductor chips. A common die-attach material used with LTJT is a silver paste consisting of silver powder (micrometer- or nanometer-sized particles) mixed in organic solvent and binder formulation. It is believed that the drying of the paste during the bonding process plays a critical role in determining the quality of the sintered bond-line. In this study, a model based on the diffusion of solvent molecules and viscous mechanics of the paste was introduced to determine the stress and strain states of the silver bond-line. A numerical simulation algorithm of the model was developed and coded in the C++ programming language. The numerical simulation allows determination of the time-dependent physical properties of the silver bond-line as the paste is being dried with a heating profile. The properties studied were solvent concentration, weight loss, shrinkage, stress, and strain. The stress is the cause of cracks in the bond-line and bond-line delamination. The simulated results were verified by experiments in which the formation of bond-line cracks and interface delamination was observed during the pressure-free drying of a die-attach nanosilver paste. The simulated results were consistent with our earlier experimental findings that the use of uniaxial pressure of a few mega-Pascals during the drying stage of a nanosilver paste was sufficient to produce high-quality sintered joints. The insight offered by this modeling study can be used to develop new paste formulations that enable pressure-free, low-temperature sintering of the die-attach material to significantly lower the cost of implementing the LTJT in manufacturing.
Energy storage for power factor correction in battery charger for electric-powered vehicles
(United States Patent and Trademark Office, 2018-03-13)
Switches of a switching circuit used to control operation of an electric motor such as in an electrically powered vehicle connect respective windings of the electric motor as a single phase inductor during battery charging. The inductor can then store inherent low frequency, second order ripple power and return that power to a load presented by a battery during battery charging to deliver substantially constant current. Storage of ripple power in the inductor allows the capacitance value, size, weight and cost of a filter capacitor of a power factor correction circuit providing input power to a battery charger to be reduced by an order of magnitude or more. Direction of current flow through the inductor is periodically reversed to avoid magnetizing the motor.
External ramp autotuning for current mode control of switching converter
(United States Patent and Trademark Office, 2017-06-13)
Peak current, valley current or average current mode controlled power converters in either digital or analog implementations obtain a stabilized feedback loop and allow high system bandwidth design by use of an external ramp generator using a slope computation equation or design parameters based on fixing the quality factor of a double pole at one-half of the switching frequency at a desired value The slope of the external ramp waveform is tuned automatically with knowledge of the slope change in the waveform of inductor current of a power converter derived by differentiating a waveform in the current feedback loop. This autotuning of the external ramp generator provides immunity of quality factor change under variations of duty cycle, component values of topological change of the power converter.
High frequency integrated point-of-load power converter with embedded inductor substrate
(United States Patent and Trademark Office, 2017-02-07)
A low profile power converter structure is provide wherein volume is reduced and power density is increased to approach 1 KW/in3 by at least one of forming an inductor as a body of magnetic material embedded in a substrate formed by a plurality of printed circuit board (PCB) lamina and forming inductor windings of PCB cladding and vias which may be of any desired number of turns and may include inversely coupled windings and which provide a lateral flux path, forming the body of magnetic material from high aspect ratio flakes of magnetic material which are aligned with the inductor magnetic field in an insulating organic binder and hot-pressed and providing a four-layer architecture comprising two layers of PCB lamina including the embedded body of magnetic material, a shield layer and an additional layer of PCB lamina, including cladding for supporting and connecting a switching circuit, a capacitor and the inductor.
Hybrid interleaving structure with adaptive phase locked loop for variable frequency controlled switching converter
(United States Patent and Trademark Office, 2018-07-03)
In a multi-phase power converter using a phase-locked loop (PLL) arrangement for interleaving of pulse frequency modulated (PFM) pulses of the respective phases, improved transient response, improved stability of high bandwidth output voltage feedback loop, guaranteed stability of the PLL loop and avoidance of jittering and phase cancellation issues are achieved by anchoring the bandwidth at the frequency of peak phase margin. This methodology is applicable to multi-phase power conveners of any number of phases and any known or foreseeable topology for individual phases and is not only applicable to power converters operating under constant on-time control, but is extendable to ramp pulse modulation (RPM) control and hysteresis control. Interleaving of pulses from all phases is simplified through use of phase managers with a reduced number of PLLS using hybrid interleaving arrangements that do not exhibit jittering even when ripple is completely canceled.
Iaverage current mode (ACM) control for switching power converters
(United States Patent and Trademark Office, 2016-05-17)
Providing a fast current sensor direct feedback path to a modulator for controlling switching of a switched power converter in addition to an integrating feedback path which monitors average current for control of a modulator provides fast dynamic response consistent with system stability and average current mode control. Feedback of output voltage for voltage regulation can be combined with current information in the integrating feedback path to limit bandwidth of the voltage feedback signal.
Low profile coupled inductor substrate with transient speed improvement
(United States Patent and Trademark Office, 2018-10-23)
A low profile inductor structure suitable for use in a high power density power converter has one or more windings formed by vias through a thin, generally planar body of magnetic material forming the inductor core and conductive cladding on the body of magnetic material or material covering the magnetic material body. Variation of inductance with load current and other operational or environmental parameters is reduced to any desired degree by forming a slot that removes all or a portion of the magnetic material between the locations of the vias.
Maximum power point tracking for solar panels
(United States Patent and Trademark Office, 2017-06-20)
Approximately one-half of the loss of delivered power from a solar panel having photovoltaic (PV) cells connected in series to form sub-panels due to shading is recovered at low hardware cost by connecting sub-panels in series and providing maximum power point tracking control in common for the series connected sub-panels such that the respective sub-panels produce equal voltages even in the presence of shading of a portion of one or more sub-panels. By doing so, the input voltage of respective power converters which control the voltage at which each sub-panel is operated can be placed close to the maximum power point of each sub-panel regardless of shading and maximum total power harvested even though the respective sub-panels are not operated at optimum voltages.

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