Browsing by Author "DiMarino, Christina"
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- Characterization, Reliability and Packaging for 300 °C MOSFETNam, David (Virginia Tech, 2020-03-06)Silicon carbide (SiC) is a wide bandgap material capable of higher voltage and higher temperature operation compared to its silicon (Si) counterparts due to its higher critical electric field (E-field) and higher thermal conductivity. Using SiC, MOSFETs with a theoretical high temperature operation and reliability is achievable. However, current bottlenecks in high temperature SiC MOSFETs lie within the limitations of standard packaging. Additionally, there are reliability issues relating to the gate oxide region of the MOSFET, which is exacerbated through high temperature conditions. In this thesis, high temperature effects on current-generation SiC MOSFETs are studied and analyzed. To achieve this, a high temperature package is created to achieve reliable operation of a SiC MOSFET at junction temperatures of 300 °C. The custom, high temperature package feasibility is verified through studying trends in SiC MOSFET behavior with increasing temperature up to 300 °C by static characterization. Additionally, the reliability of SiC MOSFETs at 300 °C is tested with accelerated lifetime bias tests.
- Design of 1.7 kV SiC MOSFET Switching-Cells for Integrated Power Electronics Building Block (iPEBB)Rajagopal, Narayanan (Virginia Tech, 2021)The need for high-density power electronics converters becomes more critical by the day as energy consumption continues to grow across the world. Specifically, the need for medium-voltage (MV) high-density converters in power distribution systems, electric ships, and airplanes become more critical as weight and space becomes more a premium. The limited space and footprint require new packaging technologies and methods to develop an integrated power converter. The advancement of wide-bandgap (WBG) devices like silicon carbide (SiC) allows converters to have higher power and faster switching... To benefit from these devices, the packaging of the converter needs to be carefully considered. This thesis presents the design of a 250 kW integrated power electronics building block (iPEBB) for future electric system applications. This work explores the common substrate concept that would serve as the electrical, thermal, and mechanical foundation for the converter. State-of-the-art organic direct-bonded copper (ODBC) is explored to serve as the material foundation for the common substrate. Multi-domain simulations are used to design the integrated SiC bridges to achieve a power loop inductance of 3.5 nH, a maximum temperature of 175 °C, and a weight of 16 kg. ODBC and silicon nitride switching cells are packaged and analyzed in order to see the benefits on a multi-layer design as well as determining electrical and thermal trade-offs. The insights gained from hardware testing will help in the redesign and refinement of the iPEBB.
- Design of a 10 kV SiC MOSFET-based high-density, high-efficiency, modular medium-voltage power converterMocevic, Slavko; Yu, Jianghui; Fan, Boran; Sun, Keyao; Xu, Yue; Stewart, Joshua; Rong, Yu; Song, He; Mitrovic, Vladimir; Yan, Ning; Wang, Jun; Cvetkovic, Igor; Burgos, Rolando; Boroyevich, Dushan; DiMarino, Christina; Dong, Dong; Motwani, Jayesh Kumar; Zhang, Richard (IEEE, 2022-03)Simultaneously imposed challenges of high-voltage insulation, high dv/dt, high-switching frequency, fast protection, and thermal management associated with the adoption of 10 kV SiC MOSFET, often pose nearly insurmountable barriers to potential users, undoubtedly hindering their penetration in medium-voltage (MV) power conversion. Key novel technologies such as enhanced gatedriver, auxiliary power supply network, PCB planar dc-bus, and high-density inductor are presented, enabling the SiC-based designs in modular MV converters, overcoming aforementioned challenges. However, purely substituting SiC design instead of Sibased ones in modular MV converters, would expectedly yield only limited gains. Therefore, to further elevate SiC-based designs, novel high-bandwidth control strategies such as switching-cycle control (SCC) and integrated capacitor-blocked transistor (ICBT), as well as high-performance/high-bandwidth communication network are developed. All these technologies combined, overcome barriers posed by state-of-the-art Si designs and unlock system level benefits such as very high power density, high-efficiency, fast dynamic response, unrestricted line frequency operation, and improved power quality, all demonstrated throughout this paper.
- Design, Fabrication, and Packaging of Gallium Oxide Schottky Barrier DiodesWang, Boyan (Virginia Tech, 2021-12-17)Gallium Oxide (Ga2O3) is an ultra-wide bandgap semiconductor with a bandgap of 4.5–4.9 eV, which is higher than the bandgap of Silicon (Si), Silicon Carbide (SiC), and Gallium Nitride (GaN). A benefit of this wide-bandgap is the high critical electric field of Ga2O3, which is estimated to be from 5 MV/cm to 9 MV/cm. This allows a higher Baliga’s figure of merit (BFOM), i.e., unipolar Ga2O3 devices potentially possess a smaller specific on-resistance (Ron,sp) as compared to the Si, SiC, and GaN devices with the same breakdown voltage (BV). This prospect makes Ga2O3 devices promising candidates for next-generation power electronics. This thesis explores the design, fabrication, and packaging of vertical Ga2O3 Schottky barrier diodes (SBDs). The power SBD allows for a small forward voltage and a fast switching speed; thus, it is ubiquitously utilized in power electronics systems. It is also a building block for many advanced power transistors. Hence, the study of Ga2O3 SBDs is expected to pave the way for developing a series of Ga2O3 power devices. In this work, a vertical β-Ga2O3 SBD with a novel edge termination, which is the small-angle beveled field plate (SABFP), is fabricated on thinned Ga2O3 substrates. This SABFP structure decreases the peak electric field (Epeak) at the triple point when the Ga2O3 SBD is reverse biased, resulting in a BV of 1.1 kV and an Epeak of 3.5 MV/cm. This device demonstrates a BFOM of 0.6 GW/cm2, which is among the highest in β-Ga2O3 power devices and is comparable to the state-of-the-art vertical GaN SBDs. The high-temperature characteristics of Ga2O3 SBDs with a 45o beveled angle sidewall edge termination are studied at temperatures up to 600 K. As compared to the state-of-the-art SiC and GaN SBDs with a similar blocking voltage, the vertical Ga2O3 SBDs are capable of operating at higher temperatures and show a smaller leakage current increase with temperature. The leakage current mechanisms were also revealed at various temperatures and reverse biases. A new fabrication method of a dielectric field plate and Ga2O3 mesa of a medium angle (10o~30o) is achieved by controlling the adhesion between the photoresist (PR) and the dielectric surface. As compared to the small-angle termination, this medium-angle edge termination can allow a superior yield and uniformity in device fabrication, at the same time maintaining the major functionalities of beveled edge termination. Good surface morphology of the field plates and Ga2O3 mesa of the medium angle 10o~30o sidewall angle is verified by atomic force microscopy. Finally, large-area Ga2O3 SBDs are fabricated and packaged using silver sintering as the die attach. The sintered silver joint has higher thermal conductivity and better reliability as compared to the solder joint. The metal finish on the anode and cathode has been optimized for silver sintering. Large-area, packaged Ga2O3 SBDs with an anode size of 3×3 mm2 are prototyped. They show a forward current of over 5 A, a current on/off ratio of ~109, and a BV of 190 V. To the best of the author’s knowledge, this is the first experimental demonstration of a large-area, packaged Ga2O3 power device.
- Evaluation and Analysis on the Effect of Power Module Architecture on Common Mode Electromagnetic InterferenceMoaz, Taha (Virginia Tech, 2023-05-02)Wide bandgap (WBG) semiconductor devices are becoming increasing popular in power electronics applications. However, WBG semiconductor devices generate a substantial amount of conducted electromagnetic interference (EMI) compared to silicon (Si) devices due to their ability to operate at higher switching frequencies, higher operating voltages and faster slew rates. This thesis explores and analyzes EMI mitigation techniques that can be applied to a power module architecture at the packaging level. In this thesis, the EMI footprint of four different module architectures is measured experimentally. A time domain LTspice simulation model of the experimental test setup is then built. The common mode (CM) EMI emissions that escape the baseplate of the module into the converter is then examined through the simulation. The simulation is used to explore the CM noise footprint of eight additional module architectures that were found in literature. The EMI trends and the underlying mitigation principle for the twelve modules is explained by highlighting key differences in the architectures using common mode equivalent modelling and substitution and superposition theorem. The work aims to help future module designers by not only comparing the EMI performance of the majority of module architectures available in literature but by also providing an analysis methodology that can be used to understand the EMI behavior of any new module architecture that has not been discussed. Although silicon carbide (SiC) modules are used for this study, the results are applicable for any WBG device.
- PCB-Based 1.2 kV SiC MOSFET Packages for High Power Density Electric Vehicle On-Board ChargersKnoll, Jack (Virginia Tech, 2022)Global energy consumption continues to grow, driving the need for cheap, power-dense power electronics. Replacing the incumbent silicon insulated gate bipolar transistors with silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs) has been proposed as a solution to increase the power densities of power converters in some applications. One such application is electric vehicles (EVs) where the efficiency and weight of the power electronics are critical; however, modern packaging technologies are still limiting the performance of SiC MOSFETs. One promising trend in power semiconductor packaging technologies is the use of printed circuit boards (PCBs) because the technology is mature—resulting in low costs—and the allowable stackups are ideal for integrating driving circuitry and power loop components—resulting in reduced manufacturing complexity. This thesis presents the design and analysis of two PCB-embedded 1.2 kV SiC MOSFET half-bridge packages and a hybrid PCB/DBC-based 1.2 kV SiC MOSFET full-bridge package for EV on-board charger applications. The first of the two PCB-embedded packages has integrated gate drive circuitry, less than 2.3 nH loop inductances, and dual-sided cooling with a total junction-to-case thermal resistance (RTH,JC) of 0.12 K/W. The second PCB-embedded package has only drain-side cooling to allow for surface mount terminals, has an area of 37.1 mm x 18.5 mm due to the removal of the gate drive circuitry, and has less than 2.4 nH loop inductances. The PCB/DBC-based full-bridge package has an RTH,JC of 0.65 K/W, less than 4.5 nH, and integrated gate drive circuitry.
- Semiconductor module arrangement(United States Patent and Trademark Office, 2018-07-24)In a switching module structure that includes a low-impedance path to ground, such as a parasitic capacitance of an insulating substrate, a further insulating substrate presenting a parasitic capacitance placed in series with the low impedance current path and a connection of a conductive layer to input voltage rails using a single decoupling capacitor or, preferably, a midpoint of the voltage rails formed by a series connection of decoupling capacitors maintains a large portion of common mode (CM) currents which are due to high dV/dt slew rates of SiC and GaN transistors within the switching module.
- Thermal management and packaging of wide and ultra-wide bandgap power devices: a review and perspectiveQin, Yuan; Albano, Benjamin; Spencer, Joseph; Lundh, James Spencer; Wang, Boyan; Buttay, Cyril; Tadjer, Marko; DiMarino, Christina; Zhang, Yuhao (IOP Publishing, 2023-03)Power semiconductor devices are fundamental drivers for advances in power electronics, the technology for electric energy conversion. Power devices based on wide-bandgap (WBG) and ultra-wide bandgap (UWBG) semiconductors allow for a smaller chip size, lower loss and higher frequency compared with their silicon (Si) counterparts, thus enabling a higher system efficiency and smaller form factor. Amongst the challenges for the development and deployment of WBG and UWBG devices is the efficient dissipation of heat, an unavoidable by-product of the higher power density. To mitigate the performance limitations and reliability issues caused by self-heating, thermal management is required at both device and package levels. Packaging in particular is a crucial milestone for the development of any power device technology; WBG and UWBG devices have both reached this milestone recently. This paper provides a timely review of the thermal management of WBG and UWBG power devices with an emphasis on packaged devices. Additionally, emerging UWBG devices hold good promise for high-temperature applications due to their low intrinsic carrier density and increased dopant ionization at elevated temperatures. The fulfillment of this promise in system applications, in conjunction with overcoming the thermal limitations of some UWBG materials, requires new thermal management and packaging technologies. To this end, we provide perspectives on the relevant challenges, potential solutions and research opportunities, highlighting the pressing needs for device-package electrothermal co-design and high-temperature packages that can withstand the high electric fields expected in UWBG devices.