Browsing by Author "Yi, Yang"

Now showing 1 - 20 of 47
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    3D Massive MIMO and Artificial Intelligence for Next Generation Wireless Networks
    Shafin, Rubayet (Virginia Tech, 2020-04-13)
    3-dimensional (3D) massive multiple-input-multiple-output (MIMO)/full dimensional (FD) MIMO and application of artificial intelligence are two main driving forces for next generation wireless systems. This dissertation focuses on aspects of channel estimation and precoding for 3D massive MIMO systems and application of deep reinforcement learning (DRL) for MIMO broadcast beam synthesis. To be specific, downlink (DL) precoding and power allocation strategies are identified for a time-division-duplex (TDD) multi-cell multi-user massive FD-MIMO network. Utilizing channel reciprocity, DL channel state information (CSI) feedback is eliminated and the DL multi-user MIMO precoding is linked to the uplink (UL) direction of arrival (DoA) estimation through estimation of signal parameters via rotational invariance technique (ESPRIT). Assuming non-orthogonal/non-ideal spreading sequences of the UL pilots, the performance of the UL DoA estimation is analytically characterized and the characterized DoA estimation error is incorporated into the corresponding DL precoding and power allocation strategy. Simulation results verify the accuracy of our analytical characterization of the DoA estimation and demonstrate that the introduced multi-user MIMO precoding and power allocation strategy outperforms existing zero-forcing based massive MIMO strategies. In 3D massive MIMO systems, especially in TDD mode, a base station (BS) relies on the uplink sounding signals from mobile stations to obtain the spatial information for downlink MIMO processing. Accordingly, multi-dimensional parameter estimation of MIMO channel becomes crucial for such systems to realize the predicted capacity gains. In this work, we also study the joint estimation of elevation and azimuth angles as well as the delay parameters for 3D massive MIMO orthogonal frequency division multiplexing (OFDM) systems under a parametric channel modeling. We introduce a matrix-based joint parameter estimation method, and analytically characterize its performance for massive MIMO OFDM systems. Results show that antenna array configuration at the BS plays a critical role in determining the underlying channel estimation performance, and the characterized MSEs match well with the simulated ones. Also, the joint parametric channel estimation outperforms the MMSEbased channel estimation in terms of the correlation between the estimated channel and the real channel. Beamforming in MIMO systems is one of the key technologies for modern wireless communication. Creating wide common beams are essential for enhancing the coverage of cellular network and for improving the broadcast operation for control signals. However, in order to maximize the coverage, patterns for broadcast beams need to be adapted based on the users' movement over time. In this dissertation, we present a MIMO broadcast beam optimization framework using deep reinforcement learning. Our proposed solution can autonomously and dynamically adapt the MIMO broadcast beam parameters based on user' distribution in the network. Extensive simulation results show that the introduced algorithm can achieve the optimal coverage, and converge to the oracle solution for both single cell and multiple cell environment and for both periodic and Markov mobility patterns.
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    An advanced neuromorphic accelerator on FPGA for next-G spectrum sensing
    Azmine, Muhammad Farhan (Virginia Tech, 2024-04-10)
    In modern communication systems, it’s important to detect and use available radio frequencies effectively. However, current methods face challenges with complexity and noise interference. We’ve developed a new approach using advanced artificial intelligence (AI) based computing techniques to improve efficiency and accuracy in this process. Our method shows promising results, requiring only minimal additional resources in exchange of improved performance compared to older techniques.
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    All Digital FM Demodulator
    Nair, Kartik (Virginia Tech, 2019-09-20)
    The proposed demodulator is an all-digital implementation of a FM demodulator. The proposed design intends to implement a FM demodulator for high-speed applications, which makes the requirements for analog components minimal. The proposed circuit is an all-digital quadrature demodulator, where the individual components have been implemented without using any multipliers. The topology uses a Pulse width modulation (PWM) block to avoid the need for a DAC. The Xilinx virtex-7 FPGA has been used as the reference device for the work. The circuit is validated through behavioral simulations and the results conclude the proposed circuit demodulates the targeted FM channel and provides the spectrum information for the targeted FM channel
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    Applying Reservoir Computing for Driver Behavior Analysis and Traffic Flow Prediction in Intelligent Transportation Systems
    Sethi, Sanchit (Virginia Tech, 2024-06-05)
    In the realm of autonomous vehicles, ensuring safety through advanced anomaly detection is crucial. This thesis integrates Reservoir Computing with temporal-aware data analysis to enhance driver behavior assessment and traffic flow prediction. Our approach combines Reservoir Computing with autoencoder-based feature extraction to analyze driving metrics from vehicle sensors, capturing complex temporal patterns efficiently. Additionally, we extend our analysis to forecast traffic flow dynamics within road networks using the same framework. We evaluate our model using the PEMS-BAY and METRA-LA datasets, encompassing diverse traffic scenarios, along with a GPS dataset of 10,000 taxis, providing real-world driving dynamics. Through a support vector machine (SVM) algorithm, we categorize drivers based on their performance, offering insights for tailored anomaly detection strategies. This research advances anomaly detection for autonomous vehicles, promoting safer driving experiences and the evolution of vehicle safety technologies. By integrating Reservoir Computing with temporal-aware data analysis, this thesis contributes to both driver behavior assessment and traffic flow prediction, addressing critical aspects of autonomous vehicle systems.
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    Big Data Meet Cyber-Physical Systems: A Panoramic Survey
    Atat, Rachad; Liu, Lingjia; Wu, Jinsong; Li, Guangyu; Ye, Chunxuan; Yi, Yang (IEEE, 2018)
    The world is witnessing an unprecedented growth of cyber-physical systems (CPS), which are foreseen to revolutionize our world via creating new services and applications in a variety of sectors, such as environmental monitoring, mobile-health systems, intelligent transportation systems, and so on. The information and communication technology sector is experiencing a significant growth in data traffic, driven by the widespread usage of smartphones, tablets, and video streaming, along with the significant growth of sensors deployments that are anticipated in the near future. It is expected to outstandingly increase the growth rate of raw sensed data. In this paper, we present the CPS taxonomy via providing a broad overview of data collection, storage, access, processing, and analysis. Compared with other survey papers, this is the first panoramic survey on big data for CPS, where our objective is to provide a panoramic summary of different CPS aspects. Furthermore, CPS requires cybersecurity to protect them against malicious attacks and unauthorized intrusion, which become a challenge with the enormous amount of data that are continuously being generated in the network. Thus, we also provide an overview of the different security solutions proposed for CPS big data storage, access, and analytics. We also discuss big data meeting green challenges in the contexts of CPS.
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    CMOS Receiver Design for Optical Communications over the Data-Rate of 20 Gb/s
    Chong, Joseph (Virginia Tech, 2018-06-21)
    Circuits to extend operation data-rate of a optical receiver is investigated in the dissertation. A new input-stage topology for a transimpedance amplifier (TIA) is designed to achieve 50% higher data-rate is presented, and a new architecture for clock recovery is proposed for 50% higher clock rate. The TIA is based on a gm-boosted common-gate amplifier. The input-resistance is reduced by modifying a transistor at input stage to be diode-connected, and therefore lowers R-C time constant at the input and yielding higher input pole frequency. It also allows removal of input inductor, which reduces design complexity. The proposed circuit was designed and fabricated in 32 nm CMOS SOI technology. Compared to TIAs which mostly operates at 50 GHz bandwidth or lower, the presented TIA stage achieves bandwidth of 74 GHz and gain of 37 dBohms while dissipating 16.5 mW under 1.5V supply voltage. For the clock recovery circuit, a phase-locked loop is designed consisting of a frequency doubling mechanism, a mixer-based phase detector and a 40 GHz voltage-controlled oscillator. The proposed frequency doubling mechanism is an all-analog architecture instead of the conventional digital XOR gate approach. This approach realizes clock-rate of 40 GHz, which is at least 50% higher than other circuits with mixer-based phase detector. Implemented with 0.13-μm CMOS technology, the clock recovery circuit presents peak-to-peak clock jitter of 2.38 ps while consuming 112 mW from a 1.8 V supply.
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    A Comparison of Image Classification with Different Activation Functions in Balanced and Unbalanced Datasets
    Zhang, Moqi (Virginia Tech, 2021-06-04)
    When the novel coronavirus (COVID-19) outbreak began to ring alarm bells worldwide, rapid, efficient diagnosis was critical to the emergency response. The limited ability of medical systems and the increasing number of daily cases pushed researchers to investigate automated models. The use of deep neural networks to help doctors make the correct diagnosis has dramatically reduced the pressure on the healthcare system. Promoting the improvement of diagnosis networks depends not only on the network structure design but also on the activation function performance. To identify an optimal activation function, this study investigates the correlation between the activation function selection and image classification performance in balanced or imbalanced datasets. Our analysis evaluates various network architectures for both commonly used and novel datasets and presents a comprehensive analysis of ten widely used activation functions. The experimental results show that the swish and softplus functions enhance the classification ability of state-of-the-art networks. Finally, this thesis distinguishes the neural networks using ten activation functions, analyzes their pros and cons, and puts forward detailed suggestions on choosing appropriate activation functions in future work.
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    A Cost-Efficient Digital ESN Architecture on FPGA
    Gan, Victor Ming (Virginia Tech, 2020-09-01)
    Echo State Network (ESN) is a recently developed machine-learning paradigm whose processing capabilities rely on the dynamical behavior of recurrent neural networks (RNNs). Its performance metrics outperform traditional RNNs in nonlinear system identification and temporal information processing. In this thesis, we design and implement ESNs through Field-programmable gate array (FPGA) and explore their full capacity of digital signal processors (DSPs) to target low-cost and low-power applications. We propose a cost-optimized and scalable ESN architecture on FPGA, which exploits Xilinx DSP48E1 units to cut down the need of configurable logic blocks (CLBs). The proposed work includes a linear combination processor with negligible deployment of CLBs, as well as a high-accuracy non-linear function approximator, both with the help of only 9 DSP units in each neuron. The architecture is verified with the classical NARMA dataset, and a symbol detection task for an orthogonal frequency division multiplexing (OFDM) system on a wireless communication testbed. In the worst-case scenario, our proposed architecture delivers a matching bit error rate (BER) compares to its corresponding software ESN implementation. The performance difference between the hardware and software approach is less than 6.5%. The testbed system is built on a software-defined radio (SDR) platform, showing that our work is capable of processing the real-world data.
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    Deep Reinforcement Learning for Next Generation Wireless Networks with Echo State Networks
    Chang, Hao-Hsuan (Virginia Tech, 2021-08-26)
    This dissertation considers a deep reinforcement learning (DRL) setting under the practical challenges of real-world wireless communication systems. The non-stationary and partially observable wireless environments make the learning and the convergence of the DRL agent challenging. One way to facilitate learning in partially observable environments is to combine recurrent neural network (RNN) and DRL to capture temporal information inherent in the system, which is referred to as deep recurrent Q-network (DRQN). However, training DRQN is known to be challenging requiring a large amount of training data to achieve convergence. In many targeted wireless applications in the 5G and future 6G wireless networks, the available training data is very limited. Therefore, it is important to develop DRL strategies that are capable of capturing the temporal correlation of the dynamic environment that only requires limited training overhead. In this dissertation, we design efficient DRL frameworks by utilizing echo state network (ESN), which is a special type of RNNs where only the output weights are trained. To be specific, we first introduce the deep echo state Q-network (DEQN) by adopting ESN as the kernel of deep Q-networks. Next, we introduce federated ESN-based policy gradient (Fed-EPG) approach that enables multiple agents collaboratively learn a shared policy to achieve the system goal. We designed computationally efficient training algorithms by utilizing the special structure of ESNs, which have the advantage of learning a good policy in a short time with few training data. Theoretical analyses are conducted for DEQN and Fed-EPG approaches to show the convergence properties and to provide a guide to hyperparameter tuning. Furthermore, we evaluate the performance under the dynamic spectrum sharing (DSS) scenario, which is a key enabling technology that aims to utilize the precious spectrum resources more efficiently. Compared to a conventional spectrum management policy that usually grants a fixed spectrum band to a single system for exclusive access, DSS allows the secondary system to dynamically share the spectrum with the primary system. Our work sheds light on the real deployments of DRL techniques in next generation wireless systems.
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    Design and Optimization of Temporal Encoders using Integrate-and-Fire and Leaky Integrate-and-Fire Neurons
    Anderson, Juliet Graciela (Virginia Tech, 2022-10-05)
    As Moore's law nears its limit, a new form of signal processing is needed. Neuromorphic computing has used inspiration from biology to produce a new form of signal processing by mimicking biological neural networks using electrical components. Neuromorphic computing requires less signal preprocessing than digital systems since it can encode signals directly using analog temporal encoders from Spiking Neural Networks (SNNs). These encoders receive an analog signal as an input and generate a spike or spike trains as their output. The proposed temporal encoders use latency and Inter-Spike Interval (ISI) encoding and are expected to produce a highly sensitive hardware implementation of time encoding to preprocess signals for dynamic neural processors. Two ISI and two latency encoders were designed using Integrate-and-Fire (IF) and Leaky Integrate-and-Fire (LIF) neurons and optimized to produce low area designs. The IF and LIF neurons were designed using the Global Foundries 180nm CMOS process and achieved an area of 186µm2 and 182µm2, respectively. All four encoders have a sampling frequency of 50kHz. The latency encoders achieved an average energy consumption per spike of 277nJ and 316pJ for the IF-based and LIF-based latency encoders, respectively. The ISI encoders achieved an average energy consumption per spike of 1.07uJ and 901nJ for the IF-based and LIF-based ISI encoders, respectively. Power consumption is proportional to the number of neurons employed in the encoder and the potential to reduce power consumption through layout-level simulations is presented. The LIF neuron is able to use a smaller membrane capacitance to achieve similar operability as the IF neuron and consumes less area despite having more components. This demonstrates that capacitor sizes are the main limitations of a small size in spiking neurons for SNNs. An overview of the design and layout process of the two presented neurons is discussed with tips for overcoming problems encountered. The proposed designs can result in a fast neuromorphic process by employing a frequency higher than 10kHz and by providing a hardware implementation that is efficient in multiple sectors like machine learning, medical implementations, or security systems since hardware is safer from hacks.
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    Differential Privacy Meets Federated Learning under Communication Constraints
    Mohammadi, Nima; Bai, Jianan; Fan, Qiang; Song, Yifei; Yi, Yang; Liu, Lingjia (IEEE, 2021)
    The performance of federated learning systems is bottlenecked by communication costs and training variance. The communication overhead problem is usually addressed by three communication-reduction techniques, namely, model compression, partial device participation, and periodic aggregation, at the cost of increased training variance. Different from traditional distributed learning systems, federated learning suffers from data heterogeneity (since the devices sample their data from possibly different distributions), which induces additional variance among devices during training. Various variance-reduced training algorithms have been introduced to combat the effects of data heterogeneity, while they usually cost additional communication resources to deliver necessary control information. Additionally, data privacy remains a critical issue in FL, and thus there have been attempts at bringing Differential Privacy to this framework as a mediator between utility and privacy requirements. This paper investigates the trade-offs between communication costs and training variance under a resource-constrained federated system theoretically and experimentally, and studies how communication reduction techniques interplay in a differentially private setting. The results provide important insights into designing practical privacy-aware federated learning systems.
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    Energy Efficient Deep Spiking Recurrent Neural Networks: A Reservoir Computing-Based Approach
    Hamedani, Kian (Virginia Tech, 2020-06-18)
    Recurrent neural networks (RNNs) have been widely used for supervised pattern recognition and exploring the underlying spatio-temporal correlation. However, due to the vanishing/exploding gradient problem, training a fully connected RNN in many cases is very difficult or even impossible. The difficulties of training traditional RNNs, led us to reservoir computing (RC) which recently attracted a lot of attention due to its simple training methods and fixed weights at its recurrent layer. There are three different categories of RC systems, namely, echo state networks (ESNs), liquid state machines (LSMs), and delayed feedback reservoirs (DFRs). In this dissertation a novel structure of RNNs which is inspired by dynamic delayed feedback loops is introduced. In the reservoir (recurrent) layer of DFR, only one neuron is required which makes DFRs extremely suitable for hardware implementations. The main motivation of this dissertation is to introduce an energy efficient, and easy to train RNN while this model achieves high performances in different tasks compared to the state-of-the-art. To improve the energy efficiency of our model, we propose to adopt spiking neurons as the information processing unit of DFR. Spiking neural networks (SNNs) are the most biologically plausible and energy efficient class of artificial neural networks (ANNs). The traditional analog ANNs have marginal similarity with the brain-like information processing. It is clear that the biological neurons communicate together through spikes. Therefore, artificial SNNs have been introduced to mimic the biological neurons. On the other hand, the hardware implementation of SNNs have shown to be extremely energy efficient. Towards achieving this overarching goal, this dissertation presents a spiking DFR (SDFR) with novel encoding schemes, and defense mechanisms against adversarial attacks. To verify the effectiveness and performance of the SDFR, it is adopted in three different applications where there exists a significant Spatio-temporal correlations. These three applications are attack detection in smart grids, spectrum sensing of multi-input-multi-output(MIMO)-orthogonal frequency division multiplexing (OFDM) Dynamic Spectrum Sharing (DSS) systems, and video-based face recognition. In this dissertation, the performance of SDFR is first verified in cyber attack detection in Smart grids. Smart grids are a new generation of power grids which guarantee a more reliable and efficient transmission and delivery of power to the costumers. A more reliable and efficient power generation and distribution can be realized through the integration of internet, telecommunication, and energy technologies. The convergence of different technologies, brings up opportunities, but the challenges are also inevitable. One of the major challenges that pose threat to the smart grids is cyber-attacks. A novel method is developed to detect false data injection (FDI) attacks in smart grids. The second novel application of SDFR is the spectrum sensing of MIMO-OFDM DSS systems. DSS is being implemented in the fifth generation of wireless communication systems (5G) to improve the spectrum efficiency. In a MIMO-OFDM system, not all the subcarriers are utilized simultaneously by the primary user (PU). Therefore, it is essential to sense the idle frequency bands and assign them to the secondary user (SU). The effectiveness of SDFR in capturing the spatio-temporal correlation of MIMO-OFDM time-series and predicting the availability of frequency bands in the future time slots is studied as well. In the third application, the SDFR is modified to be adopted in video-based face recognition. In this task, the SDFR is leveraged to recognize the identities of different subjects while they rotate their heads in different angles. Another contribution of this dissertation is to propose a novel encoding scheme of spiking neurons which is inspired by the cognitive studies of rats. For the first time, the multiplexing of multiple neural codes is introduced and it is shown that the robustness and resilience of the spiking neurons is increased against noisy data, and adversarial attacks, respectively. Adversarial attacks are small and imperceptible perturbations of the input data, which have shown to be able to fool deep learning (DL) models. So far, many adversarial attack and defense mechanisms have been introduced for DL models. Compromising the security and reliability of artificial intelligence (AI) systems is a major concern of government, industry and cyber-security researchers, in that insufficient protections can compromise the security and privacy of everyone in society. Finally, a defense mechanism to protect spiking neurons against adversarial attacks is introduced for the first time. In a nutshell, this dissertation presents a novel energy efficient deep spiking recurrent neural network which is inspired by delayed dynamic loops. The effectiveness of the introduced model is verified in several different applications. At the end, novel encoding and defense mechanisms are introduced which improve the robustness of the model against noise and adversarial attacks.
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    Energy Harvesting Circuit for Indoor Light based on the FOCV Method with an Adaptive Fraction Approach
    Wang, Junjie (Virginia Tech, 2019-10-01)
    The proposed energy harvesting circuit system is designed for indoor solar environment especially for factories where the light energy is abundant and stable. The designed circuits are intended to power wireless sensor nodes (WSNs) or other computing unit such as microcontrollers or DSPs to provide a power solution for Internet of Things (IoTs). The proposed circuit can extract maximum power from the PV panel by utilizing the maximum power point tracking (MPPT) technique. The power stage is a synchronous dual-input dual-output non-inverting buck-boost converter operating in discontinuous conduction mode (DCM) and constant on-time pulse skipping modulation (COT-PSM) to achieve voltage regulation and maximum power delivery to the load. Battery is used as secondary input also as secondary output to achieve a longer lifecycle, a fast load response time and support higher load conditions. The proposed MPPT technique doesn't require any current sensor or computing units. Fully digitalized simple circuits are used to achieve sampling, store, and comparing tasks to save power. The whole circuits including power stage and control circuits are designed and will fabricate in TSMC BCDMOS 180 nm process. The circuits are verified through schematic level simulations and post-layout simulations. The results are validated to prove the proposed circuit and control scheme work in a manner.
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    Energy-efficient Neuromorphic Computing for Resource-constrained Internet of Things Devices
    Liu, Shiya (Virginia Tech, 2023-11-03)
    Due to the limited computation and storage resources of Internet of Things (IoT) devices, many emerging intelligent applications based on deep learning techniques heavily depend on cloud computing for computation and storage. However, cloud computing faces technical issues with long latency, poor reliability, and weak privacy, resulting in the need for on-device computation and storage. Also, on-device computation is essential for many time-critical applications, which require real-time data processing and energy-efficient. Furthermore, the escalating requirements for on-device processing are driven by network bandwidth limitations and consumer anticipations concerning data privacy and user experience. In the realm of computing, there is a growing interest in exploring novel technologies that can facilitate ongoing advancements in performance. Of the various prospective avenues, the field of neuromorphic computing has garnered significant recognition as a crucial means to achieve fast and energy-efficient machine intelligence applications for IoT devices. The programming of neuromorphic computing hardware typically involves the construction of a spiking neural network (SNN) capable of being deployed onto the designated neuromorphic hardware. This dissertation presents a range of methodologies aimed at enhancing the precision and energy efficiency of SNNs. To be more precise, these advancements are achieved by incorporating four essential methods. The first method is the quantization of neural networks through knowledge distillation. This work introduces a quantization technique that effectively reduces the computational and storage resource requirements of a model while minimizing the loss of accuracy. To further enhance the reduction of quantization errors, the second method introduces a novel quantization-aware training algorithm specifically designed for training quantized spiking neural network (SNN) models intended for execution on the Loihi chip, a specialized neuromorphic computing chip. SNNs generally exhibit lower accuracy performance compared to deep neural networks (DNNs). The third approach introduces a DNN-SNN co-learning algorithm, which enhances the performance of SNN models by leveraging knowledge obtained from DNN models. The design of the neural architecture plays a vital role in enhancing the accuracy and energy efficiency of an SNN model. The fourth method presents a novel neural architecture search algorithm specifically tailored for SNNs on the Loihi chip. The method selects an optimal architecture based on gradients induced by the architecture at initialization across different data samples without the need for training the architecture. To demonstrate the effectiveness and performance across diverse machine intelligence applications, our methods are evaluated through (i) image classification, (ii) spectrum sensing, and (iii) modulation symbol detection.
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    FPGA Reservoir Computing Networks for Dynamic Spectrum Sensing
    Shears, Osaze Yahya (Virginia Tech, 2022-06-14)
    The rise of 5G and beyond systems has fuelled research in merging machine learning with wireless communications to achieve cognitive radios. However, the portability and limited power supply of radio frequency devices limits engineers' ability to combine them with powerful predictive models. This hinders the ability to support advanced 5G applications such as device-to-device (D2D) communication and dynamic spectrum sharing (DSS). This challenge has inspired a wave of research in energy efficient machine learning hardware with low computational and area overhead. In particular, hardware implementations of the delayed feedback reservoir (DFR) model show promising results for meeting these constraints while achieving high accuracy in cognitive radio applications. This thesis answers two research questions surrounding the applicability of FPGA DFR systems for DSS. First, can a DFR network implemented on an FPGA run faster and with lower power than a purely software approach? Second, can the system be implemented efficiently on an edge device running at less than 10 watts? Two systems are proposed that prove FPGA DFRs can achieve these feats: a mixed-signal circuit, followed by a high-level synthesis circuit. The implementations execute up to 58 times faster, and operate at more than 90% lower power than the software models. Furthermore, the lowest recorded average power of 0.130 watts proves that these approaches meet typical edge device constraints. When validated on the NARMA10 benchmark, the systems achieve a normalized error of 0.21 compared to state-of-the-art error values of 0.15. In a DSS task, the systems are able to predict spectrum occupancy with up to 0.87 AUC in high noise, multiple input, multiple output (MIMO) antenna configurations compared to 0.99 AUC in other works. At the end of this thesis, the trade-offs between the approaches are analyzed, and future directions for advancing this study are proposed.
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    High Performance RF Circuit Design: High Temperature, Ultra-Low Phase Noise, and Low Complexity
    Lohrabi Pour, Fariborz (Virginia Tech, 2022-01-21)
    Advanced achievements in the area of RF circuit design led to a significant increase in availability of wireless communications in everyday life. However, the rapid growth in utilizing the RF equipment has brought several challenges in different aspects of RF circuit design. This has been motivating researchers to introduce solution to cope with these challenges and further improve the performance of the RF circuits. In this dissertation, we focus on the improvements in three aspects of the circuit design. High temperature and temperature compensated transmitter design, ultra-low phase noise signal generators, and compact and low complexity polar transmitter design. Increase in the ambient temperature can impact the performance of the entire communication system. However, the RF hardware is main part of the system that is under the impact of the temperature variations in which it can change the characteristics of the individual building blocks of the RF chain. Moreover, transistors are the main elements in the circuit whose performance variation must be consider when the design target is compensating the temperature effects. The influence of the temperature variation is studied on the transistors and the building blocks in order to find the most effective approaches to compensate these variations and stabilize the performance of the RF chain at temperatures up to 220 C. A temperature sensor is designed to sense these variations and adjust the characteristics of the circuit components (e.g. bias voltages), accordingly. Further, a new variable gain phase shifter (VGPS) architecture is introduced toward minimizing the temperature impact on its performance in a phased-array transmitter architecture. Finally, a power amplifier as the last stage in a transmitter chain is designed and the variation in its performance with temperature is compensated through the VGPS stage. The transmitter is prototyped to evaluate its performance in practice. Another contribution of this dissertation is to introduce a novel voltage-controlled oscillator (VCO) structure to reduce the phase noise level below state-of-the-art. The noise to phase noise mechanism in the introduced doubly tuned oscillator is studied using linear time-variant (LTV) theory to identify the dominant noise sources and either eliminate or suppress these noise sources by introducing effective mechanism such as impedance scaling. The designed VCO is fabricated and measurement results are carried out that justified the accuracy of the analyses and effectiveness of the introduced design approach. Lastly, we introduce a compact and simple polar transmitter architecture. This type of transmitters was firstly proposed to overcome the serious shortcomings in the IQ transmitters, such as IQ imbalance and carrier leakage. However, there is still several challenges in their design. We introduce a transmitter architecture that operates based on charge to phase translation mechanism in the oscillator. This leads to significantly reduction in the design complexity, die area, and power dissipation. Further, it eliminates a number of serious issues in the design such as sampling rate of the DACs. comprehensive post-layout simulations were also performed to evaluate its performance.
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    High Temperature Microwave Frequency Voltage-Controlled Oscillator
    Turner, Nathan Isaac (Virginia Tech, 2018-08-29)
    As the oil and gas industry continues to explore higher temperature environments, electronics that operate at those temperatures without additional cooling become critical. Additionally, current communications systems cannot support the higher data-rates being offered by advancements in sensor technology. An RF modem would be capable of supplying the necessary bandwidth to support the higher data-rate. A voltage-controlled oscillator is an essential part of an RF modem. This thesis presents a 2.336-2.402 GHz voltage-controlled oscillator constructed with 0.25 μm GaN-on-SiC technology high electron mobility transistor (HEMTs). The measured operating temperature range was from 25°C to 225°C. A minimum tuning range of 66 MHz, less than 20% variation in output power, and harmonics more than 20 dB down from the fundamental is observed. The phase noise is between -88 and -101 dBc/Hz at 100 kHz offset at 225°C. This is the highest frequency oscillator that operates simultaneously at high temperatures reported in literature.
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    Investigation of Bragg Gratings in Few-Mode Fibers with a Femtosecond Laser Point-by-Point Technique
    Qiu, Tong (Virginia Tech, 2022-01-18)
    The higher-order modes (HOMs) of an optical fiber has been demonstrated as a new dimension to transmitting signals with the development of mode-division multiplexing (MDM) technique. This dissertation aims to explore the HOMs as an extra degree of freedom for device innovation. In particular, with femtosecond (FS) laser point-by-point (PbP) inscription technique which opens up a unique possibility to explore the HOMs for device innovation, we design, fabricate, and characterize novel-structured fiber Bragg gratings (FBGs) written in the step-index two-mode fibers. We also develop a numerical model for the PbP gratings which has the potential for inverse design problem. Chapter 2 begins with a general framework of MDM with adaptive wavefront shaping in few-mode fibers (FMFs) and multimode fibers (MMFs), followed by two examples in slightly more detail. The fabrication setup and an short overview of the FS laser system will also be covered. In Chapter 3, we show the design, fabrication, and characterization of off-axis Bragg gratings in a step-index two-mode fiber (TMF). Through measuring the transmission and reflection spectra along with the associated reflected mode intensity profiles under different input polarization, we experimentally investigate the off-axis TM-FBGs (FBGs in a TMF) with multiple characteristics reported for the first time to our best knowledge. To highlight, we report the laser-induced birefringence exhibits strong offset dependence, the reflectivity heavily depends on the offset and polarization, and particularly the mode pattern can be controlled solely through polarization. The design and characterization of cross-axis TM-FBGs are presented in Chapter 4. Specifically, these gratings show six primary reflection peaks, which are identified through mode-decomposition based on the intensity profiles through nonlinear optimization problem. We also show in this chapter the development of a numerical model for the general PbP gratings, implementation of this model into standard coupled-wave analysis shows reasonable agreement to the experimental findings. In Chapter 5, discussions and suggestions for future studies are given.
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    Label-Free Microfluidic Devices for Single-Cell Analysis and Liquid Biopsies
    Ghassemi, Parham (Virginia Tech, 2023-01-05)
    Mortality due to cancer is a global health issue that can be improved through further development of diagnostic and prognostic tools. Recent advancements in technologies aiding cancer research have made significant strides, however a demand for a non-invasive clinically relevant point-of-care tools exists. To accomplish this feat, the desired instrument needs to be low-cost, easy-to-operate, efficient, and have rapid processing and analysis. Microfluidic platforms in cancer research have proven to be advantageous due to its operation at the microscale, which has low costs, favorable physics, high precision, short experimentation time, and requires minimal reagent and sample sizes. Label-free technologies rely on cell biophysical characteristics to identify, evaluate, and study biological samples. Biomechanical probing of cells through deformability assays provides a label-free method of identifying cell health and monitoring response to physical and chemical stimuli. Bioimpedance analysis is an alternative versatile label-free method of evaluating cell characteristics by measuring cell response to electrical signals. Microfluidic technologies can facilitate biomechanical and bioelectrical analysis through deformability assays and impedance spectroscopy. This dissertation demonstrates scientific contributions towards single-cell analysis and liquid biopsy devices focusing on cancer research. First, cell deformability assays were improved through the introduction of multi-constriction channels, which revealed that cells have a non-linear response to deformation. Combining impedance analysis with microfluidic deformability assays provided a large dataset of mechano-electrical information, which improved cell characterization and greatly decreased post-processing times. Next, two unique biosensors demonstrated improved throughput while maintaining sensitivity of single-cell analysis assays through parallelization and incorporating machine learning for data processing. Liquid biopsies involve studying cancer cells in patient vascular systems, called circulating tumor cells (CTCs), through blood samples. CTC tests reveal valuable information on patient prognosis, diagnosis and can aide therapy selection in a minimally invasive manner. This body of work presents two liquid biopsy devices that enrich murine and human blood samples and isolate CTCs to ease detection and analysis. Additionally, a microfluidic CTC detection biosensor is introduced to reliably count and identify cancer cells in murine blood, where an extremely low-cost version of the assay is also validated. Thus, the assays presented in this dissertation show promise of microfluidic technologies towards point-of-care systems for cancer research.
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    Linearity Enhancement of High Power GaN HEMT Amplifier Circuits
    Saini, Kanika (Virginia Tech, 2019-10-04)
    Gallium Nitride (GaN) technology is capable of very high power levels but suffers from high non-linearity. With the advent of 5G technologies, high linearity is in greater demand due to complex modulation schemes and crowded RF (Radio Frequency) spectrum. Because of the non-linearity issue, GaN power amplifiers have to be operated at back-off input power levels. Operating at back-off reduces the efficiency of the power amplifier along-with the output power. This research presents a technique to linearize GaN amplifiers. The linearity can be improved by splitting a large device into multiple smaller devices and biasing them individually. This leads to the cancellation of the IMD3 (Third-order Intermodulation Distortion) components at the output of the FETs and hence higher linearity performance. This technique has been demonstrated in Silicon technology but has not been previously implemented in GaN. This research work presents for the first time the implementation of this technique in GaN Technology. By the application of this technique, improvement in IMD3 of 4 dBc has been shown for a 0.8-1.0 GHz PA (Power Amplifier), and 9.5 dBm in OIP3 (Third-order Intercept Point) for an S-Band GaN LNA, with linearity FOM (IP3/DC power) reaching up to 20. Large-signal simulation and analysis have been done to demonstrate linearity improvement for two parallel and four parallel FETs. A simulation methodology has been discussed in detail using commercial CAD software. A power sampler element is used to compute the IMD3 currents coming out of various FETs due to various bias currents. Simulation results show by biasing one device in Class AB and others in deep Class AB, IMD3 components of parallel FETs can be made out of phase of each other, leading to cancellation and improvement in linearity. Improvement up to 20 dBc in IMD3 has been reported through large-signal simulation when four parallel FETs with optimum bias were used. This technique has also been demonstrated in simulation for an X-Band MMIC PA from 8-10 GHz in GaN technology. Improvements up to 25-30 dBc were shown using the technique of biasing one device with Class AB and other with deep class AB/class B. The proposed amplifier achieves broadband linearization over the entire frequency compared to state-of-the-art PA's. The linearization technique demonstrated is simple, straight forward, and low cost to implement. No additional circuitry is needed. This technique finds its application in high dynamic range RF amplifier circuits for communications and sensing applications.