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dc.contributor.authorHunter, Jesse Everett IIIen
dc.date.accessioned2011-08-06T16:02:42Zen
dc.date.available2011-08-06T16:02:42Zen
dc.date.issued2000-04-07en
dc.identifier.otheretd-07142004-162634en
dc.identifier.urihttp://hdl.handle.net/10919/10041en
dc.description.abstractIn the realm of FPGAs, many tool vendors offer behaviorally-based simulators aimed at easing the complexity of large FPGA designs. At times, a behaviorally-modeled design does not work in hardware as expected or intended. VTsim, a Virtex-II device simulator, was designed to resolve this and many other design problems by providing a window into the FPGA fabric via a virtual device. VTsim is an event-driven device simulator modeled at the CLB level with multiple clock domain support. Utilizing JBits3 and ADB, VTsim enables simulation and examination of all resources within an FPGA via a virtual device. The only input required by VTsim is a bitstream, which can be generated from any tool suite. The simulator is part of the JHDLBits open-source project, and was designed for rapid response, low memory usage, and ease of interaction.en
dc.format.mediumETDen
dc.publisherVirginia Techen
dc.relation.haspartJesse_Hunter-Thesis.pdfen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectField programmable gate arraysen
dc.subjectDevice Simulatoren
dc.subjectJHDLBitsen
dc.subjectJHDLen
dc.subjectJBitsen
dc.subjectVTsimen
dc.subjectVirtex-IIen
dc.subjectXilinxen
dc.titleA Device-Level FPGA Simulatoren
dc.typeThesisen
dc.contributor.departmentElectrical and Computer Engineeringen
dc.description.degreeMaster of Scienceen
thesis.degree.nameMaster of Scienceen
thesis.degree.levelmastersen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.disciplineElectrical and Computer Engineeringen
dc.contributor.committeechairAthanas, Peter M.en
dc.contributor.committeememberPatterson, Cameron D.en
dc.contributor.committeememberTront, Joseph G.en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-07142004-162634en
dc.date.sdate2004-07-14en
dc.date.rdate2004-08-03en
dc.date.adate2004-08-03en


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