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dc.contributor.authorManek, Meenakshien_US
dc.date.accessioned2014-03-14T21:39:05Z
dc.date.available2014-03-14T21:39:05Z
dc.date.issued1993en_US
dc.identifier.otheretd-06232009-063212en_US
dc.identifier.urihttp://hdl.handle.net/10919/43427
dc.description.abstractThis thesis describes a Natural Language (NL) interface to a VHDL modeling tool called the Modeler's Assistant. The primary motivation for the interface developed in this research work is to permit VLSI modelers who are not proficient in VHDL to rapidly produce correct VHDL models from manufacturer's descriptions. This tool should also be useful in teaching the VHDL language. The Modeler's Assistant has supported graphical capture of behavioral models in the form of Process Model Graphs consisting of processes (nodes) interconnected by signals (arcs). The NL interface that has been constructed allows modelers to specify the behavior for the process nodes using a restricted form of English called ModelSpeak. A Spell-checking routine (of the UNIX operating system) is invoked to reduce input errors. Also, the grammar employed, accepts multi-sentence descriptions rather than just a single sentence. Correct VHDL for each process is synthesized automatically, but user interaction is solicited where needed to resolve ambiguities such as the scope of loops and the type of signals and variables. The Modeler's Assistant can then assemble the VHDL code for these processes, along with the information about the interface description from the PMG, into a complete entity model.en_US
dc.format.mediumBTDen_US
dc.publisherVirginia Techen_US
dc.relation.haspartLD5655.V855_1993.M263.pdfen_US
dc.subjectVHDL (Computer hardware description language)en_US
dc.subject.lccLD5655.V855 1993.M263en_US
dc.titleNatural language interface to a VHDL modeling toolen_US
dc.typeThesisen_US
dc.contributor.departmentElectrical Engineeringen_US
thesis.degree.nameMaster of Scienceen_US
thesis.degree.levelmastersen_US
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen_US
dc.contributor.committeechairCyre, W. D.en_US
dc.contributor.committeememberArmstrong, J. R.en_US
dc.contributor.committeememberGray, F. G.en_US
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-06232009-063212/en_US
dc.date.sdate2009-06-23en_US
dc.date.rdate2009-06-23
dc.date.adate2009-06-23en_US


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