Rapid development of VHDL behavioral models

Abstract

The enhancement of a CAD tool called Modeler's Assistant is discussed. This tool allows VHDL behavioral models to be developed more rapidly than with traditional techniques. The limitations present in the previous version of the tool (Version 2) are discussed. The correction of these limitations and the enhancement of Modeler's Assistant are the focus of the work described in this thesis. New features present in the enhanced version of Modeler's Assistant (Version 3) include the ability to create and maintain a library of parameterized process primitives and the ability to graphically represent hierarchy in VHDL behavioral models through the use of supernodes. Other enhancements that allow more features of the VHDL language to be used in Modeler's Assistant are described. Several examples that illustrate the use of these enhanced features are presented.