dc.contributor.author	Hameed, Qaisar	en
dc.contributor.committeechair	Gray, Festus Gail	en
dc.contributor.committeemember	Ha, Dong Sam	en
dc.contributor.committeemember	Armstrong, James R.	en
dc.contributor.department	Electrical and Computer Engineering	en
dc.date.accessioned	2014-03-14T20:32:30Z	en
dc.date.adate	1999-03-13	en
dc.date.available	2014-03-14T20:32:30Z	en
dc.date.issued	1999-03-03	en
dc.date.rdate	1999-03-13	en
dc.date.sdate	1999-03-10	en
dc.description.abstract	A digital board typically contains a heterogeneous mixture of chips: microprocessors, memory, control and I/O logic. Different testing techniques are needed for each of these components. To test the whole board, these techniques must be integrated into an overall testing strategy for the board. In this thesis, we have applied a behavioral testing scheme to test the board. Each component chip is tested by observing the behavior of the system in response to the test code, i.e. the component under test is not isolated from the rest of the circuit during test. This obviates the need for the extra hardware used for isolating the chips that is required for structural testing. But this is done at the cost of reduced fault location, although fault detection is still adequate. We have applied the start small approach to behavioral testing. We start by testing a small core of functions. Then, only those functions already tested are used to test the remaining behavior. The grand goal is testing the whole board. This is divided into goals for testing each of the individual chips, which is further subdivided into sub-goals for each of the sub-functions of the board or sub-goals for testing for the most common faults in a component. Each component is tested one by one. Once a component passes, it is put in a passed items set and then can be used in testing the remaining components. Using the start small approach helps isolate the faults to the chip level and thus results in better fault location than the simple behavioral testing scheme in which there is no concept of passed items set and its usage. As an example, this testing approach is applied to a microcontroller based temperature sensor board. This code is run on the VHDL model of the system, and then also on the actual system. For modeling the system in VHDL, Synopsys Smart model library components are used. Faults are injected in the system and then the performance of the strategy is evaluated. This strategy is found to be very effective in detecting internal faults of the chip and locating the faults to the chip level. The interconnection faults are difficult to locate although they are detected in most of the cases. Different scenarios for incorporating this scheme in legacy systems are also discussed.	en
dc.description.degree	Master of Science	en
dc.identifier.other	etd-031099-213422	en
dc.identifier.sourceurl	http://scholar.lib.vt.edu/theses/available/etd-031099-213422/	en
dc.identifier.uri	http://hdl.handle.net/10919/31445	en
dc.language.iso	en	en
dc.publisher	Virginia Tech	en
dc.relation.haspart	introchap1.pdf	en
dc.relation.haspart	chap4.pdf	en
dc.relation.haspart	chap2.pdf	en
dc.relation.haspart	appendix.pdf	en
dc.relation.haspart	chap3.pdf	en
dc.relation.haspart	chap5nref.pdf	en
dc.relation.haspart	vita.pdf	en
dc.rights	In Copyright	en
dc.rights.uri	http://rightsstatements.org/vocab/InC/1.0/	en
dc.subject	March X	en
dc.subject	Smart Model	en
dc.subject	Start Small	en
dc.subject	VHDL	en
dc.subject	Assembly	en
dc.subject	Legacy Systems	en
dc.subject	Testing	en
dc.title	A Behavioral Test Strategy For Board Level Systems	en
dc.type	Thesis	en
thesis.degree.discipline	Electrical and Computer Engineering	en
thesis.degree.grantor	Virginia Polytechnic Institute and State University	en
thesis.degree.level	masters	en
thesis.degree.name	Master of Science	en

A Behavioral Test Strategy For Board Level Systems

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