Double-Sided Liquid Cooling for Power Semiconductor Devices Using Embedded Power Technology

Simple item page
dc.contributor.authorCharboneau, Bryan Charlesen
dc.contributor.committeechairBoroyevich, Dushanen
dc.contributor.committeememberWang, Fei Freden
dc.contributor.committeemembervan Wyk, Daanen
dc.contributor.committeememberScott, Elaine P.en
dc.contributor.departmentElectrical and Computer Engineeringen
dc.date.accessioned2014-03-14T20:34:16Zen
dc.date.adate2006-05-26en
dc.date.available2014-03-14T20:34:16Zen
dc.date.issued2005-07-22en
dc.date.rdate2006-05-26en
dc.date.sdate2006-04-25en
dc.description.abstractPower electronics is a constantly growing and demanding technical field. Consumer demand and developing technologies have made the improvement of power density a primary emphasis of research for this area. Power semiconductors present some of the major challenges for increasing system level power density due to high loss density and interconnection requirements. Advanced cooling schemes, such as double-sided, forced liquid convection or multi-phase flow, can be implemented with non-wire bond packaging to improve thermal management while maintaining proper electrical performance. Embedded power is one such packaging technology, which provides a compact structure for interface of power semiconductor to fluid flow. The objective of this work was to identify the potential of implementing embedded power packaging with double-sided forced liquid convection. Physics based, electro-thermal models were first used to predict the improvement in heat transfer of double-sided, forced liquid convection with embedded power packaging over single-sided liquid cooled wire bond based packaging. A liquid module test bed was designed and constructed based on the electro-thermal models, which could be interfaced with high power MOSFET based samples implementing various packaging technologies. Experiments were used to verify the model predictions and identify practical limitations of high flow rate, double-sided liquid cooling with embedded power. An improvement of 45% to 60% in total junction to case thermal resistance is shown for embedded power packaging with double-sided liquid cooling for water flow rates between 0.25 and 4.5 gal/min.en
dc.description.degreeMaster of Scienceen
dc.identifier.otheretd-04252006-044651en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-04252006-044651/en
dc.identifier.urihttp://hdl.handle.net/10919/31907en
dc.publisherVirginia Techen
dc.relation.haspartCharboneauThesisFinalRevA.pdfen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectsemiconductor packagingen
dc.subjectdouble-sided coolingen
dc.subjectliquid convectionen
dc.titleDouble-Sided Liquid Cooling for Power Semiconductor Devices Using Embedded Power Technologyen
dc.typeThesisen
thesis.degree.disciplineElectrical and Computer Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.levelmastersen
thesis.degree.nameMaster of Scienceen

Files

Original bundle
Now showing 1 - 1 of 1
Thumbnail Image
Name:
CharboneauThesisFinalRevA.pdf
Size:
1.54 MB
Format:
Adobe Portable Document Format
Download

Collections

Masters Theses