Development of Web-Based Educational Modules for Developing VHDL Models of Digital Systems

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1997-08-07
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Virginia Tech
Abstract

Hardware description languages (HDLs) such as VHDL have made it possible for circuit and board designs to be done without resorting to paper, allowing computers to manage the design database and automate the translation between various representations of the system.

Although VHDL modeling can provide a bonanza of benefits, VHDL models must be used effectively to reduce overall development costs. Air Force acquisition specialist for such agencies as the U.S. Air Force must be able to manage the development of VHDL models to ensure that the models delivered meet both their immediate and their future needs.

In this research study, effort has been made to explain the many facets and advantages of VHDL and the use of VHDL in various stages of the acquisition process. The RASSP design concepts, such as top-down design, reuse and the model year concepts and integrated design environment, are introduced. Different abstraction levels from written specification to gate level in the design process are explained. Design techniques, such as modular design, reuse and sharing of designs, multiple abstraction level simulation and mixed data type simulation, and design trade-offs, are illustrated. The Sobel edge detection system is used as our case study to illustrate multiple abstraction levels and their use in the acquisition process. The methodology of developing an easy access, low-cost and effective VHDL education and guidance materials for Air Force acquisition and maintenance specialists is explained. The primary focus of this thesis is to develop a World Wide Web (WWW) based educational module for the acquisition process.

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Keywords
VHDL, Education, Modeling, Hardware Design
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