An Algorithm and System for Measuring Impedance in D-Q Coordinates
| dc.contributor.author | Francis, Gerald | en |
| dc.contributor.committeechair | Boroyevich, Dushan | en |
| dc.contributor.committeemember | Lesko, John J. | en |
| dc.contributor.committeemember | Burgos, Rolando | en |
| dc.contributor.committeemember | Baumann, William T. | en |
| dc.contributor.committeemember | Tranter, William H. | en |
| dc.contributor.department | Electrical and Computer Engineering | en |
| dc.date.accessioned | 2014-03-14T20:08:19Z | en |
| dc.date.adate | 2010-05-10 | en |
| dc.date.available | 2014-03-14T20:08:19Z | en |
| dc.date.issued | 2010-01-25 | en |
| dc.date.rdate | 2013-05-10 | en |
| dc.date.sdate | 2010-03-19 | en |
| dc.description.abstract | This dissertation presents work conducted at the Center for Power Electronics Systems (CPES) at Virginia Polytechnic Institute and State University. Chapter 1 introduces the concept of impedance measurement, and discusses previous work on this topic. This chapter also addresses issues associated with impedance measurement. Chapter 2 introduces the analyzer architecture and the proposed algorithm. The algorithm involves locking on to the voltage vector at the point of common coupling between the analyzer and the system via a PLL to establish a D-Q frame. A series of sweeps are performed, injecting at least two independent angles in the D-Q plane, acquiring D- and Q-axis voltages and currents for each axis of injection at the point of interest. Chapter 3 discusses the analyzer hardware and the criteria for selection. The hardware built ranges from large-scale power level hardware to communication hardware implementing a universal serial bus. An eight-layer PCB was constructed implementing analog signal conditioning and conversion to and from digital signals with high resolution. The PCB interfaces with the existing Universal Controller hardware. Chapter 4 discusses the analyzer software. Software was written in C++, VHDL, and Matlab to implement the measurement process. This chapter also provides a description of the software architecture and individual components. Chapter 5 discusses the application of the analyzer to various examples. A dynamic model of the analyzer is constructed, considering all components of the measurement system. Congruence with predicted results is demonstrated for three-phase balanced linear impedance networks, which can be directly derived based on stationary impedance measurements. Other impedances measured include a voltage source inverter, Vienna rectifier, six-pulse rectifier and an autotransformer-rectifier unit. | en |
| dc.description.degree | Ph. D. | en |
| dc.identifier.other | etd-03192010-150706 | en |
| dc.identifier.sourceurl | http://scholar.lib.vt.edu/theses/available/etd-03192010-150706/ | en |
| dc.identifier.uri | http://hdl.handle.net/10919/26462 | en |
| dc.publisher | Virginia Tech | en |
| dc.relation.haspart | FRANCIS_G_D_2010.pdf | en |
| dc.rights | In Copyright | en |
| dc.rights.uri | http://rightsstatements.org/vocab/InC/1.0/ | en |
| dc.subject | Three Phase AC Systems | en |
| dc.subject | Impedance Measurement | en |
| dc.subject | D-Q Coordinates | en |
| dc.subject | Rotating Coordinate Systems | en |
| dc.subject | Power Electronics | en |
| dc.subject | Transfer Functions | en |
| dc.title | An Algorithm and System for Measuring Impedance in D-Q Coordinates | en |
| dc.type | Dissertation | en |
| thesis.degree.discipline | Electrical and Computer Engineering | en |
| thesis.degree.grantor | Virginia Polytechnic Institute and State University | en |
| thesis.degree.level | doctoral | en |
| thesis.degree.name | Ph. D. | en |
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