Simulation and implementation of fixed-point digital filter structures

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dc.contributor.authorBailey, Daniel A.en
dc.contributor.committeechairBeex, A. A. Louisen
dc.contributor.committeememberReed, Jeffrey H.en
dc.contributor.committeememberVanLandingham, Hugh F.en
dc.contributor.departmentElectrical Engineeringen
dc.date.accessioned2014-03-14T21:40:21Zen
dc.date.adate2009-07-11en
dc.date.available2014-03-14T21:40:21Zen
dc.date.issued1995-09-26en
dc.date.rdate2009-07-11en
dc.date.sdate2009-07-11en
dc.description.abstractThe purpose of this research is to develop a fixed-point arithmetic model based on a common general purpose Digital Signal Processor (DSP). A detailed non-linear model is developed to emulate the convergent (un-biased) rounding process performed by the Motorola DSP56002 fixed-point DSP. This model is incorporated into several different filter structures and compared to the linear stochastic simulation and the actual hardware implementation. It turns out that the convergent rounding operation has an insignificant effect on the overall roundoff noise power. The Direct Form, Section Optimal and MA Lattice forms are studied. F or these structures, Matlab routines are developed to automate the process of fixed-point scaling and DSP56002 code generation. Each structure's non-linear simulation is validated using two filter examples. The scaling and simulation routines allow the filter designer to investigate the finite word length performance of various structures, scaling norms, overflow safety factors, and word lengths to determine the best filter parameters prior to hardware implementation.en
dc.description.degreeMaster of Scienceen
dc.format.extentvi, 130 leavesen
dc.format.mediumBTDen
dc.format.mimetypeapplication/pdfen
dc.identifier.otheretd-07112009-040546en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-07112009-040546/en
dc.identifier.urihttp://hdl.handle.net/10919/43697en
dc.language.isoenen
dc.publisherVirginia Techen
dc.relation.haspartLD5655.V855_1995.B355.pdfen
dc.relation.isformatofOCLC# 34123390en
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectDigital Signal Processoren
dc.subject.lccLD5655.V855 1995.B355en
dc.titleSimulation and implementation of fixed-point digital filter structuresen
dc.typeThesisen
dc.type.dcmitypeTexten
thesis.degree.disciplineElectrical Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.levelmastersen
thesis.degree.nameMaster of Scienceen

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