Design and testing of a prototype in-line chip quality monitor

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dc.contributor.authorAuel, John B.en
dc.contributor.committeechairStuart, William B.en
dc.contributor.committeememberOderwald, Richard G.en
dc.contributor.committeememberZink-Sharp, Audrey G.en
dc.contributor.departmentForestryen
dc.date.accessioned2014-03-14T21:37:31Zen
dc.date.adate2009-06-10en
dc.date.available2014-03-14T21:37:31Zen
dc.date.issued1996-09-06en
dc.date.rdate2009-06-10en
dc.date.sdate2009-06-10en
dc.description.abstractThis project involved the design and testing of a prototype in-line chip quality monitor for gathering process control information for the manufacturers of wood chips. This monitor specifically addresses three common complaints with current chip sampling procedures. Chip sampling occurs too late in the process. It is inadequate. It is too infrequent to develop management information. The monitor is composed of a double screen drum separator to divide chips into oversize, accepts, and pins/fines. Counterbalanced tip buckets are used to weigh each size class. Tip bucket cycles are recorded by a computer via magnetic proximity switches attached to each bucket. This information is then used to chart production of chip size classes, updated continuously over the sorting period. This monitor is capable of sorting one ton of chips per hour. Two trials were conducted to test the monitor. One in a lab environment, and one on site at a chip mill. Both trials compared monitor output with independent samples classified using a Williams classifier. The trials showed that outputs were consistent with Williams output. This monitor can effectively chart chip distribution information. This process control information provides the manufacturer with immediate knowledge of chipper performance.en
dc.description.degreeMaster of Scienceen
dc.format.extentviii, 51 leavesen
dc.format.mediumBTDen
dc.format.mimetypeapplication/pdfen
dc.identifier.otheretd-06102009-063437en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-06102009-063437/en
dc.identifier.urihttp://hdl.handle.net/10919/43014en
dc.language.isoenen
dc.publisherVirginia Techen
dc.relation.haspartLD5655.V855_1996.A945.pdfen
dc.relation.isformatofOCLC# 36114202en
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectcontrol charten
dc.subjectclassifieren
dc.subjectmonitoren
dc.subjectchip classificationen
dc.subject.lccLD5655.V855 1996.A945en
dc.titleDesign and testing of a prototype in-line chip quality monitoren
dc.typeThesisen
dc.type.dcmitypeTexten
thesis.degree.disciplineForestryen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.levelmastersen
thesis.degree.nameMaster of Scienceen

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