Planar Packaging and Electrical Characterization of High Temperature SiC Power Electronic Devices

dc.contributor.authorYue , Nailien
dc.contributor.committeechairLu, Guo-Quanen
dc.contributor.committeecochairNgo, Khai D. T.en
dc.contributor.committeememberSuchicital, Carlos T. A.en
dc.contributor.committeememberClark, David E.en
dc.contributor.departmentMaterials Science and Engineeringen
dc.date.accessioned2014-03-14T20:50:20Zen
dc.date.adate2008-12-31en
dc.date.available2014-03-14T20:50:20Zen
dc.date.issued2008-11-21en
dc.date.rdate2008-12-31en
dc.date.sdate2008-12-18en
dc.description.abstractThis thesis examines the packaging of high-temperature SiC power electronic devices. Current-voltage measurements were conducted on as-received and packaged SiC power devices. The planar structure was introduced and developed as a substitution for traditional wire-bonding vertical structure. The planar structure was applied to a high temperature (>250oC) SiC power device. Based on the current-voltage (I-V) measurements, the packaging structures were improved, materials were selected, and processes were tightly controlled. This study applies two types of planar structures, the direct bond and the bump bond, to the high-temperature packaging of high-temperature SiC diode. A drop in the reverse breakdown voltage was discovered in the packaging using a direct bond. The root cause for the drop in the breakdown voltage was identified and corrective solutions were evaluated. A few effective methods were suggested for solving the breakdown issue. The forward I-V curve of the planar packaging using direct bond showed excellent results due to the excellent electrical and thermal properties of sintered nanosilver. The packaging using a bump bond as an improved structure was processed and proved to possess desirable forward and reverse I-V behavior. The cross-sections of both planar structures were inspected. High-temperature packaging materials, including nano-silver paste, high-lead solder ball and paste, adhesive epoxy, and encapsulant, were introduced and evaluated. The processes such as stencil printing, low-temperature sintering, solder reflowing, epoxy curing, sputtering deposition, electroplating, and patterning of direct-bond copper (DBC) were tightly controlled to ensure high-quality packaging with improved performance. Finally, the planar packaging of the high temperature power device was evaluated and summarized, and the future work was recommended.en
dc.description.degreeMaster of Scienceen
dc.identifier.otheretd-12182008-231247en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-12182008-231247/en
dc.identifier.urihttp://hdl.handle.net/10919/36278en
dc.language.isoenen
dc.publisherVirginia Techen
dc.relation.haspartMasterThesis_NailiYue_Final.pdfen
dc.relation.haspartCoppyright_Permission_for_NailiYue_MSThesis.pdfen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectsintered nanoscale silveren
dc.subjectpower electronic deviceen
dc.subjectplanar structureen
dc.subjecthigh temperatureen
dc.subjectsolder bumpen
dc.titlePlanar Packaging and Electrical Characterization of High Temperature SiC Power Electronic Devicesen
dc.typeThesisen
thesis.degree.disciplineMaterials Science and Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.levelmastersen
thesis.degree.nameMaster of Scienceen
Files
Original bundle
Now showing 1 - 2 of 2
Loading...
Thumbnail Image
Name:
MasterThesis_NailiYue_Final.pdf
Size:
2.66 MB
Format:
Adobe Portable Document Format
Loading...
Thumbnail Image
Name:
Coppyright_Permission_for_NailiYue_MSThesis.pdf
Size:
193.1 KB
Format:
Adobe Portable Document Format
Collections