Behavioral testbench development for DSP models

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dc.contributor.authorHrishikesh, Srinivasanen
dc.contributor.committeechairArmstrong, James R.en
dc.contributor.committeememberGray, Festus Gailen
dc.contributor.committeememberCyre, Walling R.en
dc.contributor.departmentElectrical Engineeringen
dc.date.accessioned2014-03-14T21:26:37Zen
dc.date.adate2009-01-10en
dc.date.available2014-03-14T21:26:37Zen
dc.date.issued1995-02-05en
dc.date.rdate2009-01-10en
dc.date.sdate2009-01-10en
dc.description.abstractGeneration of testbenches for large DSP behavioral models is a complicated, labor intensive task. Also, tests generated manually satisfy no formal definition of completeness. To address these needs, high level approaches to test bench development are employed which relieve the modeler of the details of test bench development. Two basic approaches that are used currently for testbench development are behavioral and structural testbench development. This thesis concentrates on the development of a methodology for modeling a set of behavioral testbenches. Here, a CASE tool, I-Logix Express V-HDL, is used to model state-machine as well as data flow behavior of the testbench and then dump the corresponding VHDL code automatically. Two approaches are followed for the generation of data values for the inputs to the testbenches: 1) File I/O and 2) User interaction. This thesis also describes the development of an intelligent user interface (in C) which prompts the user for the input data values and combines this information with the testbench code. The intelligent interface also allows the user to specify and control file I/O as a data source. As an implementation of this methodology, testbenches for the following two DSP applications have been developed and are described here : 1) Infra-Red Search and Track algorithm and 2) Synthetic Aperture Radar.en
dc.description.degreeMaster of Scienceen
dc.format.extentx, 160 leavesen
dc.format.mediumBTDen
dc.format.mimetypeapplication/pdfen
dc.identifier.otheretd-01102009-063025en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-01102009-063025/en
dc.identifier.urihttp://hdl.handle.net/10919/40545en
dc.language.isoenen
dc.publisherVirginia Techen
dc.relation.haspartLD5655.V855_1995.H757.pdfen
dc.relation.isformatofOCLC# 34071647en
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectmethodology developmenten
dc.subject.lccLD5655.V855 1995.H757en
dc.titleBehavioral testbench development for DSP modelsen
dc.typeThesisen
dc.type.dcmitypeTexten
thesis.degree.disciplineElectrical Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.levelmastersen
thesis.degree.nameMaster of Scienceen

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