OpenPR: An Open-Source Partial Reconfiguration Tool-Kit for Xilinx FPGAs
dc.contributor.author | Sohanghpurwala, Ali Asgar Ali Akbar | en |
dc.contributor.committeechair | Athanas, Peter M. | en |
dc.contributor.committeemember | Schaumont, Patrick R. | en |
dc.contributor.committeemember | Jones, Mark T. | en |
dc.contributor.department | Electrical and Computer Engineering | en |
dc.date.accessioned | 2014-03-14T20:50:32Z | en |
dc.date.adate | 2011-03-08 | en |
dc.date.available | 2014-03-14T20:50:32Z | en |
dc.date.issued | 2010-12-20 | en |
dc.date.rdate | 2011-03-08 | en |
dc.date.sdate | 2010-12-20 | en |
dc.description.abstract | The Xilinx Partial Reconfiguration tool kits have been instrumental for performing a wide variety of research on Xilinx FPGAs. These tool kits provide a methodology for creating rectangular partial reconfiguration modules that can be swapped in and out of a static baseline design with one or more PR slots. This thesis presents a new PR toolkit called OpenPR that, for starters, provides similar functionality to the Xilinx PR tool kits. The distinguishing feature of this toolkit is that it is being released as open source, and is intended to be customizable to the needs of researchers. OpenPR has been designed to be easy to use, extensible, portable, and compatible with a wide range of Xilinx software and devices. Aside from supporting the slot-based PR paradigm, OpenPR also provides a solid base for further research into partial reconfiguration and FPGA productivity oriented design tools. | en |
dc.description.degree | Master of Science | en |
dc.identifier.other | etd-12202010-163240 | en |
dc.identifier.sourceurl | http://scholar.lib.vt.edu/theses/available/etd-12202010-163240/ | en |
dc.identifier.uri | http://hdl.handle.net/10919/36348 | en |
dc.publisher | Virginia Tech | en |
dc.relation.haspart | Sohanghpurwala_AA_T_2010.pdf | en |
dc.rights | In Copyright | en |
dc.rights.uri | http://rightsstatements.org/vocab/InC/1.0/ | en |
dc.subject | open-source | en |
dc.subject | Field programmable gate arrays | en |
dc.subject | partial-reconfiguration | en |
dc.title | OpenPR: An Open-Source Partial Reconfiguration Tool-Kit for Xilinx FPGAs | en |
dc.type | Thesis | en |
thesis.degree.discipline | Electrical and Computer Engineering | en |
thesis.degree.grantor | Virginia Polytechnic Institute and State University | en |
thesis.degree.level | masters | en |
thesis.degree.name | Master of Science | en |
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