Methods for Securing the Integrity of FPGA Configurations

Simple item page
dc.contributor.authorWebb, James Braxtonen
dc.contributor.committeechairJones, Mark T.en
dc.contributor.committeememberPatterson, Cameron D.en
dc.contributor.committeememberAthanas, Peter M.en
dc.contributor.departmentElectrical and Computer Engineeringen
dc.date.accessioned2014-03-14T20:46:01Zen
dc.date.adate2006-10-18en
dc.date.available2014-03-14T20:46:01Zen
dc.date.issued2006-08-29en
dc.date.rdate2006-10-18en
dc.date.sdate2006-09-27en
dc.description.abstractAs Field Programmable Gate Arrays (FPGAs) continue to become integral parts of embedded systems, it is imperative to consider their security. While much of the research in this field is oriented toward the protection of the intellectual property contained in the FPGA's configuration, the protection of the design's integrity from malicious attack against the configuration is critical to the operation of the system. Methods for attacking the configuration are semi-invasive attacks, such as fault injection, and data tampering of incoming partial bitstreams. This thesis introduces methods for securing the integrity of an FPGA's configuration. The design and implementation is discussed for a system that consists of three parts. The first subsystem monitors the running configuration. The second subsystem authenticates partial bistreams that may be used for repairing the configuration from malicious alterations during run-time. The third subsystem indicates if the system itself succumbs to a malicious attack. The system is implemented on-chip, allowing the FPGA to effectively secure itself from attack.en
dc.description.degreeMaster of Scienceen
dc.identifier.otheretd-09272006-114810en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-09272006-114810/en
dc.identifier.urihttp://hdl.handle.net/10919/35209en
dc.publisherVirginia Techen
dc.relation.haspartWebb_Thesis.pdfen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectauthenticationen
dc.subjectintegrityen
dc.subjectfault-injectionen
dc.subjectembedded systemen
dc.subjectreconfigurableen
dc.subjectdynamicen
dc.subjectpartialen
dc.subjectsecurityen
dc.subjectField programmable gate arraysen
dc.subjectconfigurationen
dc.subjectconfigurableen
dc.titleMethods for Securing the Integrity of FPGA Configurationsen
dc.typeThesisen
thesis.degree.disciplineElectrical and Computer Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.levelmastersen
thesis.degree.nameMaster of Scienceen

Files

Original bundle
Now showing 1 - 1 of 1
Thumbnail Image
Name:
Webb_Thesis.pdf
Size:
916.2 KB
Format:
Adobe Portable Document Format
Download

Collections

Masters Theses