Design of a Power-aware Dataflow Processor Architecture

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dc.contributor.authorNarayanaswamy, Ramya Priyadharshinien
dc.contributor.committeechairJones, Mark T.en
dc.contributor.committeecochairMartin, Thomas L.en
dc.contributor.committeememberPlassmann, Paul E.en
dc.contributor.departmentElectrical and Computer Engineeringen
dc.date.accessioned2014-03-14T20:42:02Zen
dc.date.adate2010-08-12en
dc.date.available2014-03-14T20:42:02Zen
dc.date.issued2010-07-20en
dc.date.rdate2010-08-12en
dc.date.sdate2010-07-26en
dc.description.abstractIn a sensor monitoring embedded computing environment, the data from a sensor is an event that triggers the execution of an application. A sensor node consists of multiple sensors and a general purpose processor that handles the multiple events by deploying an event-driven software model. The software overheads of the general purpose processors results in energy inefficiency. What is needed is a class of special purpose processing elements which are more energy efficient for the purpose of computation. In the past, special purpose microcontrollers have been designed which are energy efficient for the targeted application space. However, reuse of the same design techniques is not feasible for other application domains. Therefore, this thesis presents a power-aware dataflow processor architecture targeted for the electronic textile computing space. The processor architecture has no instructions, and handles multiple events inherently without deploying software methods. This thesis also shows that the power-aware implementation reduces the overall static power consumption.en
dc.description.degreeMaster of Scienceen
dc.identifier.otheretd-07262010-183257en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-07262010-183257/en
dc.identifier.urihttp://hdl.handle.net/10919/34192en
dc.publisherVirginia Techen
dc.relation.haspartNarayanaswamy_RP_T_2010.pdfen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectUPFen
dc.subjectE-textilesen
dc.subjectDataflowen
dc.subjectPower-awareen
dc.titleDesign of a Power-aware Dataflow Processor Architectureen
dc.typeThesisen
thesis.degree.disciplineElectrical and Computer Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.levelmastersen
thesis.degree.nameMaster of Scienceen

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