Shipboard MVDC Voltage Stabilization by Negative Load Energy Storage Compensated Virtual Capacitance

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Date

2019-09-26

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Virginia Tech

Abstract

Shipboard MVDC power systems need to support pulsed loads, which have destabilizing ef-fects on the MVDC power transmission bus voltage. Despite the reference shipboard MVDC architecture having energy storage to buffer the large power swings of pulsed loads, a large constant power still needs to be delivered to maintain the energy storage state of charge. This recharging constant power itself introduces small signal instability to the MVDC bus voltage. This thesis investigates the advantages of adding a dynamically tuneable virtual capacitor and resistor in parallel to the pulsed load for maintaining small signal stability. The stabi-lizer is implemented in a negative load configuration in the existing reference architecture hardware, where the stabilizer negatively impacts the power quality of the downstream load. To address this, a dual use is added to existing hardware by having the energy storage also cancel out the newly introduced noise. A controller was designed to control a MVDC power converter module for providing these stability services. In addition, the controller manages its internal energy storage and stabilizes its internal DC bus that powers its downstream pulsed load.

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Keywords

Shipboard MVDC, Pulsed Load, Voltage Stability, Virtual Stabilizer

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