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A Unifying Interface Abstraction for Accelerated Computing in Sensor Nodes

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dc.contributor.authorIyer, Srikrishnaen
dc.contributor.committeechairSchaumont, Patrick R.en
dc.contributor.committeememberShukla, Sandeep K.en
dc.contributor.committeememberYang, Yalingen
dc.contributor.departmentElectrical and Computer Engineeringen
dc.date.accessioned2014-03-14T20:43:44Zen
dc.date.adate2011-08-31en
dc.date.available2014-03-14T20:43:44Zen
dc.date.issued2011-08-09en
dc.date.rdate2011-08-31en
dc.date.sdate2011-08-18en
dc.description.abstractHardware-software co-design techniques are very suitable to develop the next generation of sensornet applications, which have high computational demands. By making use of a low power FPGA, the peak computational performance of a sensor node can be improved without significant degradation of the standby power dissipation. In this contribution, we present a methodology and tool to enable hardware/software co-design for sensor node application development. We present the integration of nesC, a sensornet programming language, with GEZEL, an easy-to-use hardware description language. We describe the hardware/software interface at different levels of abstraction: at the level of the design language, at the level of the co-simulator, and in the hardware implementation. We use a layered, uniform approach that is particularly suited to deal with the heterogeneous interfaces typically found on small embedded processors. We illustrate the strengths of our approach by means of a prototype application: the integration of a hardware-accelerated crypto-application in a nesC application.en
dc.description.degreeMaster of Scienceen
dc.identifier.otheretd-08182011-172058en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-08182011-172058/en
dc.identifier.urihttp://hdl.handle.net/10919/34625en
dc.publisherVirginia Techen
dc.relation.haspartIyer_SR_T_2011.pdfen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectCommunication Interface-Abstraction Architectureen
dc.subjectautomatic code-generationen
dc.subjectTinyOSen
dc.subjectnesCen
dc.subjectGEZELen
dc.subjecthardware/software co-designen
dc.subjectco-processoren
dc.subjectwireless sensor nodesen
dc.subjectCPUen
dc.subjectField programmable gate arraysen
dc.titleA Unifying Interface Abstraction for Accelerated Computing in Sensor Nodesen
dc.typeThesisen
thesis.degree.disciplineElectrical and Computer Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.levelmastersen
thesis.degree.nameMaster of Scienceen

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