An analysis of non-utility generation alternatives

Interest in BiCMOS technology has been generated recently due to the potential advantages this technology offers over conventional CMOS which enjoys widespread use in today’s semiconductor industry. However, before BiCMOS can be readily adopted by the VLSI community, an understanding of the design issues and tradeoffs involved when utilizing it, must be achieved. The principal focus of this research is to move towards such an understanding through the means of analytical modeling and circuit simulation using PSPICE [1].

The device chosen for the modeling approach is the basic BiCMOS Inverting Buffer Driver. The model yields equations that characterize output rise and fall transients and quantify the delays incurred therein. At the end of the analysis, we have a composite set of delay equations that are a measure of the total gate delay and reflect the importance of individual device and circuit parameters in determining this delay. Further investigations conducted to determine the influence of device, circuit and process parameters on BiCMOS, indicate that this technology is far more resilient to variations in such parameters than CMOS. At the end of this research, we are able to make a definitive judgement about BiCMOS performance and its superiority over CMOS in the switching speed domain.