A model for end-to-end delay in distributed computer systems
dc.contributor.author | Deeds, John J. | en |
dc.contributor.committeechair | Ricci, Fred J. | en |
dc.contributor.committeemember | Schaefer, Daniel J. | en |
dc.contributor.committeemember | Kossakes, George C. | en |
dc.contributor.department | Electrical Engineering | en |
dc.date.accessioned | 2014-03-14T21:44:39Z | en |
dc.date.adate | 2009-09-05 | en |
dc.date.available | 2014-03-14T21:44:39Z | en |
dc.date.issued | 1993-05-15 | en |
dc.date.rdate | 2009-09-05 | en |
dc.date.sdate | 2009-09-05 | en |
dc.description.abstract | Mitchell [1,2] describes end-to-end performance for a LAN-based computer system as the total system throughput and delay for a single-thread transaction. This model is used for a variety of applications. The single-thread transaction might, for example, be a remote database update or a real-time control activity. To model end-to-end performance, one must include the host computers, the network interface units (NIUs), the host-NIU links, and the NIU-NIU links. Based on Jackson's Theorem, total delay for single-thread transaction traversing a computer network can be approximated by the sum of delays in the host computers, the network interface units, the host-NIU links, and the NIU-NIU links. The host computer performance model can be refined by applying execution path analysis. Execution path analysis examines the structure of each software routine to be executed and provides an expression of time delay as a function of probabilities associated with conditional branches and a function of data input size. Spreadsheet models provide quick and convenient solutions for purposes of performing computer system tuning and capacity planning as demonstrated by Thomas [10]. This thesis paper extends the typical modeling approach by providing more detailed analysis of host computer delay, more specifically, the execution path analysis. In addition, spreadsheet models are implemented to demonstrate the execution path analysis and to provide comparisons with previously implemented models. | en |
dc.description.degree | Master of Science | en |
dc.format.extent | iii, 48 leaves | en |
dc.format.medium | BTD | en |
dc.format.mimetype | application/pdf | en |
dc.identifier.other | etd-09052009-040608 | en |
dc.identifier.sourceurl | http://scholar.lib.vt.edu/theses/available/etd-09052009-040608/ | en |
dc.identifier.uri | http://hdl.handle.net/10919/44576 | en |
dc.language.iso | en | en |
dc.publisher | Virginia Tech | en |
dc.relation.haspart | LD5655.V855_1993.D443.pdf | en |
dc.relation.isformatof | OCLC# 28685498 | en |
dc.rights | In Copyright | en |
dc.rights.uri | http://rightsstatements.org/vocab/InC/1.0/ | en |
dc.subject.lcc | LD5655.V855 1993.D443 | en |
dc.subject.lcsh | Electronic data processing -- Distributed processing | en |
dc.subject.lcsh | Local area networks (Computer networks) | en |
dc.title | A model for end-to-end delay in distributed computer systems | en |
dc.type | Thesis | en |
dc.type.dcmitype | Text | en |
thesis.degree.discipline | Electrical Engineering | en |
thesis.degree.grantor | Virginia Polytechnic Institute and State University | en |
thesis.degree.level | masters | en |
thesis.degree.name | Master of Science | en |
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