Computation of parasitics in multilayer hybrid microelectronics

Simple item page
dc.contributor.authorMarchand, Roger T.en
dc.contributor.departmentElectrical Engineeringen
dc.date.accessioned2014-03-14T21:51:03Zen
dc.date.adate2009-12-05en
dc.date.available2014-03-14T21:51:03Zen
dc.date.issued1992en
dc.date.rdate2009-12-05en
dc.date.sdate2009-12-05en
dc.description.abstractLayout parasitics result from electromagnetic interaction between circuit metalizations used to connect devices on the hybrid circuit. Three linked programs have been written to calculate the capacitance and inductance between circuit metalizations. (1) XT Editor A user friendly hybrid circuit layout editor which enables the user to create circuit layouts and select portions of the circuit for parasitic computation. (2) XT Mesh A two and three dimensional fully automatic mesh generator. The mesh generator combines the quadrant/octant subdivision method and Watson's algorithm in a four step process. Initial triangulations are created and cell compatibility is ensured using an alternating initial mesh scheme. This method produces substantial time savings by avoiding the use of data tree structures and stringent cell size rules. (3) XT Field Solver A two and three dimensional finite element quasi-TEM solver which calculates the capacitance and inductance between circuit metalizations.en
dc.description.degreeMaster of Scienceen
dc.format.extentvi, 114 leavesen
dc.format.mediumBTDen
dc.format.mimetypeapplication/pdfen
dc.identifier.otheretd-12052009-020108en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-12052009-020108/en
dc.identifier.urihttp://hdl.handle.net/10919/46135en
dc.language.isoenen
dc.publisherVirginia Techen
dc.relation.haspartLD5655.V855_1992.M3725.pdfen
dc.relation.isformatofOCLC# 26820553en
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subject.lccLD5655.V855 1992.M3725en
dc.subject.lcshElectric circuitsen
dc.subject.lcshMicroelectronicsen
dc.titleComputation of parasitics in multilayer hybrid microelectronicsen
dc.typeThesisen
dc.type.dcmitypeTexten
thesis.degree.disciplineElectrical Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.levelmastersen
thesis.degree.nameMaster of Scienceen

Files

Original bundle
Now showing 1 - 1 of 1
Thumbnail Image
Name:
LD5655.V855_1992.M3725.pdf
Size:
3.99 MB
Format:
Adobe Portable Document Format
Description:
Download

Collections

Masters Theses