Raytheon PB 440 disk interface design
| dc.contributor.author | Wiley, Paris Herschel | en |
| dc.contributor.department | Electrical Engineering | en |
| dc.date.accessioned | 2016-04-21T15:35:17Z | en |
| dc.date.available | 2016-04-21T15:35:17Z | en |
| dc.date.issued | 1970 | en |
| dc.description.abstract | This thesis describes interfacing electronics designed to couple the Magnafile 8502 disk storage unit to the Raytheon PB 440 computer. The computer can use the disk for both data storage and recovery. However, data must be exchanged in blocks of 1024 words (one complete track on the disk). The interfacing was designed incorporating diode-to-transistor logic (DTL) integrated circuits. The PB 440 computer has sufficient speed and capability to effectively use the disk storage unit at an operating speed of 3450 rpm (1725 rpm is also available). The bit transfer rate is approximately 2.1 megahertz. The 32,768 word disk capacity (expandable to 131,072 words) extends the capability of the PB 440 to include commonly used general programming languages. | en |
| dc.description.degree | Master of Science | en |
| dc.format.extent | v, 41 leaves | en |
| dc.format.mimetype | application/pdf | en |
| dc.identifier.uri | http://hdl.handle.net/10919/70550 | en |
| dc.language.iso | en | en |
| dc.publisher | Virginia Polytechnic Institute and State University | en |
| dc.relation.isformatof | OCLC# 38532483 | en |
| dc.rights | In Copyright | en |
| dc.rights.uri | http://rightsstatements.org/vocab/InC/1.0/ | en |
| dc.subject.lcc | LD5655.V855 1970.W53 | en |
| dc.title | Raytheon PB 440 disk interface design | en |
| dc.type | Thesis | en |
| dc.type.dcmitype | Text | en |
| thesis.degree.discipline | Electrical Engineering | en |
| thesis.degree.grantor | Virginia Polytechnic Institute and State University | en |
| thesis.degree.level | masters | en |
| thesis.degree.name | Master of Science | en |
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