Design, Optimization, and Integration of a SiC-Based Traction Inverter with Enhanced Current Sharing for Paralleled Discrete Devices

Abstract

Electric vehicles (EVs) with hybrid or full electric traction drives have emerged as leading contenders for reducing exhaust emission. In the traction drive system, dc/ac inverters that spin the motor need to deliver high power, high efficiency, and high density. According to the U.S. Department of Energy (DOE) roadmap, the 2025 targets for traction inverters include achieving a power density of 100 kW/L, reducing inverter cost to $2.7/kW, reaching efficiency of 98 %, and supporting voltage of 800 V. To meet these aggressive targets, this dissertation first investigates one of the critical challenges in high-power inverters: current sharing among paralleled devices. In Chapter 2, the current-sharing mechanisms are comprehensively analyzed, and mathematical models are developed to describe both dynamic and static sharing. These models enable clear identification of key impact parameters, providing practical layout guidelines for designers. Building upon the current sharing analysis, Chapter 3 explores passive current-balancing methods to improve both static and dynamic current sharing. The layout for paralleled devices is first optimized by categorizing and comparing different layout types with a focus on minimizing parasitic loop inductance Lloop and overlapping capacitance C. Then, a novel distributed-block (DB) layout concept is proposed to improve current sharing by mitigating asymmetric parasitic among paralleled traces. Furthermore, the differential-mode-choke (DMC) gate driver is introduced to enhance the dynamic current sharing without impairing power loop and switching performance. While passive methods are effective for layout-induced current imbalance, they remain limited when device mismatch is significant. To address this, Chapter 4 proposes an active gate driver (AGD) solution. A low-cost and compact di/dt-RC current sensing technique is introduced, along with a novel RK sensing structure to improve sensing accuracy. The proposed RK sensing structure requires only three tiny components (2 resistors and 1 capacitor) per MOSFET and can be easily scaled for more paralleled devices, making it highly advantageous for industrial applications. Leveraging this sensing technique, the AGD is developed to balance dynamic currents among paralleled devices, offering a near-perfect balancing performance regardless of imbalance cause. Beyond device-level current balancing, achieving high power density for traction inverters remains challenging in both academia and commercial EVs, and requires system-level circuit and mechanical integration. Chapter 5 proposes a systematic "single-board" integration strategy, and an all-in-one half-bridge (HB) printed circuit board (PCB) is built to demonstrate the proposed strategy. This design not only simplifies integration but also eliminates the constraints of conventional "sandwich" structures, achieving a power density of 101.7 kW/L. A comprehensive experimental evaluation of designed all-in-one HB PCB is also performed. Finally, Chapter 6 addresses the thermal challenges of high-density inverters, which become more and more critical as both power and density increase. A systematic thermal design methodology is proposed for high-density inverters and is validated using two prototypes: a 200 kW multi-level inverter in harsh high-altitude environment and a 200 kW traction inverter using the all-in-one HB PCB. Results reveal that conventional sandwich structures create stagnating air spaces that degrade cooling performance and generate localized hot spots. By contrast, the proposed single-board approach eliminates these thermal bottlenecks and enables robust heat dissipation.