VTechWorks staff will be away for the Thanksgiving holiday beginning at noon on Wednesday, November 27, through Friday, November 29. We will resume normal operations on Monday, December 2. Thank you for your patience.
 

An Application Framework for a Power-Aware Processor Architecture

dc.contributor.authorMandlekar, Anup Shrikanten
dc.contributor.committeechairJones, Mark T.en
dc.contributor.committeememberMartin, Thomas L.en
dc.contributor.committeememberPlassmann, Paul E.en
dc.contributor.departmentElectrical and Computer Engineeringen
dc.date.accessioned2014-03-14T20:43:18Zen
dc.date.adate2012-08-31en
dc.date.available2014-03-14T20:43:18Zen
dc.date.issued2012-08-07en
dc.date.rdate2012-08-31en
dc.date.sdate2012-08-11en
dc.description.abstractThe instruction-set based general purpose processors are not energy-efficient for event-driven applications. The E-textiles group at Virginia Tech proposed a novel data-flow processor architecture design to bridge the gap between event-driven applications and the target architecture. The architecture, although promising in terms of performance and energy-efficiency, was explored for limited number of applications. This thesis presents a model-driven approach for the design of an application framework, facilitating rapid development of software applications to test the architecture performance. The application framework is integrated with the prior automation framework bringing software applications at the right level of abstraction. The processor architecture design is made flexible and scalable, making it suitable for a wide range of applications. Additionally, an embedded flash memory based architecture design for reduction in the static power consumption is proposed. This thesis estimates significant reduction in overall power consumption with the incorporation of flash memory.en
dc.description.degreeMaster of Scienceen
dc.identifier.otheretd-08112012-013904en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-08112012-013904/en
dc.identifier.urihttp://hdl.handle.net/10919/34484en
dc.publisherVirginia Techen
dc.relation.haspartMandlekar_AS_T_2012.pdfen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectLow Power Flash Memory Cellsen
dc.subjectModel Driven Engineeringen
dc.subjectSimulinken
dc.subjectDataflow Architectureen
dc.titleAn Application Framework for a Power-Aware Processor Architectureen
dc.typeThesisen
thesis.degree.disciplineElectrical and Computer Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.levelmastersen
thesis.degree.nameMaster of Scienceen

Files

Original bundle
Now showing 1 - 1 of 1
Loading...
Thumbnail Image
Name:
Mandlekar_AS_T_2012.pdf
Size:
1.53 MB
Format:
Adobe Portable Document Format

Collections