A Low-Power, Variable-Resolution Analog-to-Digital Converter

dc.contributor.authorAust, Carrie Ellenen
dc.contributor.committeememberReed, Jeffrey H.en
dc.contributor.committeememberAthanas, Peter M.en
dc.contributor.committeememberHa, Dong Samen
dc.contributor.departmentElectrical and Computer Engineeringen
dc.date.accessioned2014-03-14T20:40:30Zen
dc.date.adate2000-07-11en
dc.date.available2014-03-14T20:40:30Zen
dc.date.issued2000-06-16en
dc.date.rdate2001-07-11en
dc.date.sdate2000-06-25en
dc.description.abstractAnalog-to-digital converters (ADCs) are used to convert analog signals to the digital domain in digital communications systems. An ADC used in wireless communications should meet the necessary requirements for the worst-case channel condition. However, the worst-case scenario rarely occurs. As a consequence, a high-resolution and subsequently high power ADC designed for the worst case is not required for most operating conditions. A solution to reduce the power dissipation of ADCs in wireless digital communications systems is to detect the current channel condition and to dynamically vary the resolution of the ADC according to the given channel condition. In this thesis, we investigated an ADC that can change its resolution dynamically and, consequently, its power dissipation. Our ADC is a switched-current, redundant signed-digit (RSD) cyclic implementation that easily incorporates variable resolution. Furthermore, the RSD cyclic algorithm is insensitive to offsets, allowing simple, low-power comparators. Our ADC is implemented in a 0.35 um CMOS technology with a single-ended 3.3 V power supply. Our ADC has a maximum power dissipation of 6.35 mW for a 12-bit resolution and dissipates an average of 10 percent less power when the resolution is decreased by two bits. Simulation results indicate our ADC achieves a bit rate of 1.7 MHz and has a SNR of 84 dB for the maximum input frequency of 8.3 kHz.en
dc.description.degreeMaster of Scienceen
dc.identifier.otheretd-06252000-22510045en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-06252000-22510045/en
dc.identifier.urihttp://hdl.handle.net/10919/33737en
dc.publisherVirginia Techen
dc.relation.haspartFinal.pdfen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectAnalog-to-digital converteren
dc.subjectADCen
dc.subjectLow poweren
dc.subjectVariable resolutionen
dc.titleA Low-Power, Variable-Resolution Analog-to-Digital Converteren
dc.typeThesisen
thesis.degree.disciplineElectrical and Computer Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.levelmastersen
thesis.degree.nameMaster of Scienceen

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