A Statistical and Circuit Based Technique for Counterfeit Detection in Existing ICs
| dc.contributor.author | Moudgil, Rashmi | en |
| dc.contributor.committeechair | Nazhandali, Leyla | en |
| dc.contributor.committeemember | Hsiao, Michael S. | en |
| dc.contributor.committeemember | Schaumont, Patrick R. | en |
| dc.contributor.department | Electrical and Computer Engineering | en |
| dc.date.accessioned | 2013-06-08T08:00:14Z | en |
| dc.date.available | 2013-06-08T08:00:14Z | en |
| dc.date.issued | 2013-06-07 | en |
| dc.description.abstract | Counterfeit Integrated Circuits (ICs) are previously used ICs that are resold as new. They have become a serious problem in modern electronic devices. They cause lower performance, reduced life span and even catastrophic failure of systems and platforms. To prevent counterfeiting and the associated revenue loss, there is need for non-invasive and inexpensive techniques to establish the authenticity of devices. We describe a technique to detect a counterfeit IC that does not have any special anti-counterfeiting mechanisms built-in prior to deployment. Our detection criterion is based on measuring path delays. The experiments show that a single path delay cannot directly reveal the age, as it is also greatly influenced by process variation and this could result in large error in classifying ICs as authentic or counterfeit. �Instead, we establish that the relationship between the delays of two or more paths is a great indicator for the age of device. The idea is to project ICs from different age groups onto the space of the path delays and train a trusted reference hyper-surface for each age group. Ideally, the hyper-surfaces do not overlap. In this way, an IC under test can be assigned to one hyper-surface based on the distance of its footprint with respect to these hyper-surfaces, thus predicting its age. In our simulations, we observe over 97% correct prediction of identifying an aged IC from a new IC. | en |
| dc.description.degree | Master of Science | en |
| dc.format.medium | ETD | en |
| dc.identifier.other | vt_gsexam:1045 | en |
| dc.identifier.uri | http://hdl.handle.net/10919/23177 | en |
| dc.publisher | Virginia Tech | en |
| dc.rights | In Copyright | en |
| dc.rights.uri | http://rightsstatements.org/vocab/InC/1.0/ | en |
| dc.subject | Counterfeits | en |
| dc.subject | Aging | en |
| dc.subject | Process Variation | en |
| dc.title | A Statistical and Circuit Based Technique for Counterfeit Detection in Existing ICs | en |
| dc.type | Thesis | en |
| thesis.degree.discipline | Computer Engineering | en |
| thesis.degree.grantor | Virginia Polytechnic Institute and State University | en |
| thesis.degree.level | masters | en |
| thesis.degree.name | Master of Science | en |
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