On Enhancing Deterministic Sequential ATPG

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dc.contributor.authorDuong, Khanh Vieten
dc.contributor.committeechairHsiao, Michael S.en
dc.contributor.committeememberHa, Dong Samen
dc.contributor.committeememberShukla, Sandeep K.en
dc.contributor.departmentElectrical and Computer Engineeringen
dc.date.accessioned2014-03-14T20:31:56Zen
dc.date.adate2011-03-15en
dc.date.available2014-03-14T20:31:56Zen
dc.date.issued2011-02-01en
dc.date.rdate2011-03-15en
dc.date.sdate2011-02-19en
dc.description.abstractThis thesis presents four different techniques for improving the average-case performance of deterministic sequential circuit Automatic Test Patterns Generators (ATPG). Three techniques make use of information gathered during test generation to help identify more unjustifiable states with higher percentage of "don't care" value. An approach for reducing the search space of the ATPG was introduced. The technique can significantly reduce the size of the search space but cannot ensure the completeness of the search. Results on ISCAS–85 benchmark circuits show that all of the proposed techniques allow for better fault detection in shorter amounts of time. These techniques, when used together, produced test vectors with high fault coverages. Also investigated in this thesis is the Decision Inversion Problem which threatens the completeness of ATPG tools such as HITEC or ATOMS. We propose a technique which can eliminate this problem by forcing the ATPG to consider search space with certain flip-flops untouched. Results show that our technique eliminated the decision inversion problem, ensuring the soundness of the search algorithm under the 9-valued logic model.en
dc.description.degreeMaster of Scienceen
dc.identifier.otheretd-02192011-083101en
dc.identifier.sourceurlhttp://scholar.lib.vt.edu/theses/available/etd-02192011-083101/en
dc.identifier.urihttp://hdl.handle.net/10919/31283en
dc.publisherVirginia Techen
dc.relation.haspartDuong_KV_T_2011.pdfen
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subjectAutomatic Test Pattern Generationen
dc.subjectLogic Testingen
dc.subjectSequential Circuitsen
dc.titleOn Enhancing Deterministic Sequential ATPGen
dc.typeThesisen
thesis.degree.disciplineElectrical and Computer Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.levelmastersen
thesis.degree.nameMaster of Scienceen

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