Multimodule simulation techniques for chip level modeling

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dc.contributor.authorCho, Chang H.en
dc.contributor.departmentElectrical Engineeringen
dc.date.accessioned2021-10-26T20:10:04Zen
dc.date.available2021-10-26T20:10:04Zen
dc.date.issued1986en
dc.description.abstractA design and implementation of a multimodule chip-level simulator whose source description language is based on the original GSP2 system is described. To enhance the simulation speed, a special addressing ("sharing single memory location") scheme is used in the implementation of pin connections. The basic data structures and algorithms for the simulator are described. The developed simulator can simulate many digital devices interconnected as a digital network. It also has the capability of modeling external buses and handling the suspension of processes in the environment of multimodule simulation. An example of a multimodule digital system simulation is presented.en
dc.description.degreeM.S.en
dc.format.extentviii, 114 leavesen
dc.format.mimetypeapplication/pdfen
dc.identifier.urihttp://hdl.handle.net/10919/106085en
dc.language.isoenen
dc.publisherVirginia Polytechnic Institute and State Universityen
dc.relation.isformatofOCLC# 13958044en
dc.rightsIn Copyrighten
dc.rights.urihttp://rightsstatements.org/vocab/InC/1.0/en
dc.subject.lccLD5655.V855 1986.C562en
dc.subject.lcshDigital computer simulationen
dc.subject.lcshElectronic digital computers -- Design -- Data processingen
dc.subject.lcshLogic design -- Data processingen
dc.titleMultimodule simulation techniques for chip level modelingen
dc.typeThesisen
dc.type.dcmitypeTexten
thesis.degree.disciplineElectrical Engineeringen
thesis.degree.grantorVirginia Polytechnic Institute and State Universityen
thesis.degree.levelmastersen
thesis.degree.nameM.S.en

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