Surge-energy and Overvoltage Robustness of Cascode GaN Power Transistors
| dc.contributor.author | Song, Qihao | en |
| dc.contributor.committeechair | Zhang, Yuhao | en |
| dc.contributor.committeecochair | Yi, Yang | en |
| dc.contributor.committeemember | Li, Qiang | en |
| dc.contributor.department | Electrical and Computer Engineering | en |
| dc.date.accessioned | 2022-07-07T18:44:06Z | en |
| dc.date.available | 2022-07-07T18:44:06Z | en |
| dc.date.issued | 2022-05-23 | en |
| dc.description.abstract | Surge-energy robustness is essential for power devices in many applications such as automotive powertrains and electricity grids. While Si and SiC MOSFETs can dissipate surge energy via avalanche, the GaN high-electron-mobility transistor (HEMT) has no avalanche capability and withstands surge energy by its overvoltage capability. However, a comprehensive study into the surge-energy robustness of the cascode GaN HEMT, a composite device made of a GaN HEMT and a Si metal-oxide-semiconductor field-effect-transistor (MOSFET), is still lacking. This work fills this gap by investigating the failure and degradation of 650-V-rated cascode GaN HEMTs in single-event and repetitive unclamped inductive switching (UIS) tests. The cascode was found to withstand surge energy by the overvoltage capability of the GaN HEMT, accompanied by an avalanche in the Si MOSFET. In single-event UIS tests, the cascode failed in the GaN HEMT at a peak overvoltage of 1.4~1.7 kV, which is statistically lower than the device's static breakdown voltage (1.8~2.2 kV). In repetitive UIS tests, the device failure boundary was found to be frequency-dependent. At 100 kHz, the failure boundary (~1.3 kV) was even lower than the single-event UIS boundary. After 1 million cycles of 1.25-kV UIS stresses, devices showed significant but recoverable parametric shifts. Physics-based device simulation and modeling were then performed to understand the circuit test results. The electron trapping in the buffer layer of the GaN HEMT can explain all the above failure and degradation behaviors in the GaN HEMT and the resulted change in its dynamic breakdown voltage. Moreover, the GaN buffer trapping is believed to be assisted by the Si MOSFET avalanche. An analytical model was also developed to extract the charges and losses produced in the Si avalanche in a UIS cycle. These results provide new insights into the surge-energy and overvoltage robustness of cascode GaN HEMTs. | en |
| dc.description.abstractgeneral | Power conversion technologies are now inseparable in industrial and commercial applications with widespread solar panels, laptops, data centers, and electric vehicles. Power devices are the critical components of power conversion systems. Since the introduction of Si power metal-oxide-semiconductor field-effect-transistor (MOSFET) in the mid-1970s, it has become the go-to device that enables efficient and reliable power conversion. After decades of practice on Si MOSFET, the device performance has reached the theoretical limit of the Si material. The recent introduction of wide-bandgap (WBG) power transistors, represented by silicon carbide (SiC) and gallium nitride (GaN) devices with superior figures of merits, opens the door for faster and more efficient power systems. To exploit the benefits of WBG devices, researchers need to evaluate the reliability and robustness of these devices comprehensively. The work presented here provides a study on the robustness of one mainstream GaN power transistor – the cascode GaN high-electron-mobility transistor (HEMT). This robustness test replicates the surge events in power electronics systems and exams their impact on power devices. Over the years, people have thoroughly investigated the surge-energy robustness of Si MOSFETs and concluded that Si MOSFETs are very robust against these surge events thanks to the avalanche mechanism. However, GaN HEMTs lack p-n junction structures between the two major electrodes, leading to the lack of avalanche ability. Instead, GaN HEMTs rely on the overvoltage capability to sustain the surge energy. For the first time, this work evaluates the surge-energy and overvoltage ruggedness of cascode GaN HEMTs, a major player in the GaN power device market. By analyzing the device failure mechanism and degradation behaviors, this research work provides insight into the weakness of these devices for both device designers and application engineers. | en |
| dc.description.degree | M.S. | en |
| dc.format.medium | ETD | en |
| dc.format.mimetype | application/pdf | en |
| dc.identifier.uri | http://hdl.handle.net/10919/111158 | en |
| dc.language.iso | en | en |
| dc.publisher | Virginia Tech | en |
| dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 International | en |
| dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | en |
| dc.subject | Wide-bandgap | en |
| dc.subject | Power Electronics | en |
| dc.subject | Power Device | en |
| dc.subject | Gallium Nitride | en |
| dc.subject | Robustness | en |
| dc.subject | Unclamped Inductive Switching | en |
| dc.title | Surge-energy and Overvoltage Robustness of Cascode GaN Power Transistors | en |
| dc.type | Thesis | en |
| thesis.degree.discipline | Electrical Engineering | en |
| thesis.degree.grantor | Virginia Polytechnic Institute and State University | en |
| thesis.degree.level | masters | en |
| thesis.degree.name | M.S. | en |